Digital-to-analog converter waveform generator

Patent metadata

Field	Value
Publication number	US-9998133-B2
Application number	US-201715656964-A
Country	US
Kind code	B2
Filing date	Jul 21, 2017
Priority date	Sep 9, 2013
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A method for testing a DAC comprising controlling the DAC digitally to cause it to produce a known desired analog output, for example a fixed amplitude sine wave; determining the duration of fixed voltage segments of the actual output of the DAC and using the duration of the fixed voltage segments to assess or determine performance of the DAC.

First claim

The invention claimed is:

1. A method of using a digital-to-analog converter (DAC) to generate an analog output waveform, the method comprising:
providing an input code for controlling the DAC digitally to cause the DAC to produce a corresponding analog output;
using a duration of fixed voltage segments determined from an actual analog output of the DAC, applying a correction to the input code of the DAC to produce a corrected input code; and
controlling the DAC digitally using the corrected input code to produce the corresponding analog output.

2. The method of claim 1 , comprising determining the duration of the fixed voltage segments from the actual analog output of the DAC.

3. The method of claim 2 , comprising segmenting the output of the DAC before determining the duration of the fixed voltage segments.

4. The method of claim 3 , wherein each segment extends over a voltage range that is slightly larger than that of the corresponding fixed voltage segment.

5. The method of claim 1 , comprising using an amplitude or amplitude time gradient for at least one of the fixed voltage segments to determine a correction to the input code of the DAC to produce a corrected input code.

6. The method of claim 1 , comprising determining in a frequency domain a correction to the input code of the DAC to produce a corrected input code.

7. The method of claim 1 , wherein the analog output waveform is a fixed amplitude sine wave.

8. The method of claim 1 , comprising providing active flicker noise cancellation for correcting flicker noise in an analog output of the DAC, the providing active flicker noise cancellation comprising:
detecting a time when the analog output passes a specified point in a repeating signal,
identifying variations between the detected time and an expected time and
applying a correction to an input code of the DAC to reduce the identified variations to cause correction of the analog output of the DAC such that flicker noise is actively cancelled.

9. The method as claimed in claim 8 , further comprising using a chopper stabilized comparator circuit in identifying variations between the detected time and the expected time.

10. A system to generate an analog output waveform, the system comprising:
a digital-to-analog converter (DAC) to generate the analog output waveform using a corrected input code determined using a duration of fixed voltage segments determined from an actual analog output of the DAC to adjust an input code for controlling the DAC digitally to produce a corresponding analog output.

11. The system of claim 10 , comprising:
a digital signal processor (DSP) circuit to control the DAC, the DSP circuit comprising:
a digital signal input to receive an input code for controlling the DAC digitally to cause the DAC to produce a corresponding analog output;
a time duration input to receive a duration of fixed voltage segments determined from an actual analog output of the DAC; and
wherein the DSP circuit is configured to use the duration to determine and apply a correction to the input code of the DAC to produce a corrected input code to apply to the DAC to control the DAC digitally using the corrected input code to produce the corresponding analog output signal.

12. The system of claim 10 , wherein the output of the DAC is segmented before determining the duration of the fixed voltage segments.

13. The system of claim 12 , wherein each segment extends over a voltage range that is slightly larger than that of the corresponding fixed voltage segment.

14. The system of claim 11 , wherein an amplitude or amplitude time gradient is used for at least one of the fixed voltage segments to determine a correction to the input code of the DAC to produce a corrected input code.

15. The system of claim 10 , wherein a correction to the input code of the DAC is determined in a frequency domain.

16. The system of claim 10 , wherein the analog output waveform is a fixed amplitude sine wave.

17. The system of claim 10 , comprising:
a timer circuit to measure time durations corresponding to various transitions between various DAC analog output voltages corresponding to transitions in digital input codes.

18. The system of claim 17 , wherein the timer circuit comprises:
at least one comparator circuit, providing a threshold voltage for comparing at least one corresponding analog output voltage level corresponding to a respective digital input code; and
a clock circuit, coupled to the comparator circuit to measure a time in relation to the analog output voltage level meeting the threshold voltage level.

19. The system of claim 18 , wherein the at least one comparator circuit includes a chopper stabilized comparator circuit.

20. The system of claim 18 , wherein the at least one comparator circuit includes two comparator circuits providing respective first and second threshold voltages for comparing at least one corresponding analog output voltage level against to determine a time duration corresponding to a transition of the analog output voltage level corresponding to transitions in digital input codes.

21. A system to generate an analog output waveform, the system comprising:
a digital-to-analog converter (DAC) to generate the analog output waveform;
a digital signal processor (DSP) circuit to control the DAC, the DSP circuit comprising:
a digital signal input to receive an input code for controlling the DAC digitally to cause the DAC to produce a corresponding analog output;
a time duration input to receive a duration of fixed voltage segments determined from an actual analog output of the DAC; and
wherein the DSP circuit is configured to use the duration to determine and apply a correction to the input code of the DAC to produce a corrected input code to apply to the DAC to control the DAC digitally using the corrected input code to produce the corresponding analog output signal.

22. The method of claim 1 , wherein the actual analog output of the DAC is a buffered output provided by an amplifier that is coupled to the DAC.

23. The method of claim 1 , wherein the duration of the fixed voltage segments are determined using at least one comparator to compare a signal value to at least one threshold value.

24. The method of claim 1 , wherein the duration of the fixed voltage segments are determined using an analog-to-digital converter (ADC) to convert an analog signal to a digital signal for digital comparison to one or more digital threshold values.

25. The method of claim 1 , comprising providing the corresponding analog output to an input of an analog-to-digital converter (ADC) circuit to generate a responsive digital signal output provided by the ADC.

Assignees

• Analog Devices Inc

Inventors

• Hamilton David
• Clayton Tom
• Sharp Gordon
• Stevenson Ian

Classifications

• H03M1/08 Primary

  of noise {(H03M1/0617 takes precedence)} · CPC title

• H03M1/66

  Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

• H03M1/1085 Primary

  using domain transforms, e.g. Fast Fourier Transform · CPC title

• H03K5/2472

  using field effect transistors (H03K5/2436 takes precedence) · CPC title