Programmable switched capacitor block

Patent metadata

Field	Value
Publication number	US-9998105-B2
Application number	US-201414493635-A
Country	US
Kind code	B2
Filing date	Sep 23, 2014
Priority date	May 30, 2014
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal.

First claim

What is claimed is:

1. An apparatus comprising:
a first input to receive a programming signal corresponding to an analog function that is based on either single ended signaling or differential signaling;
a first analog block coupled to the first input, the first analog block comprising a first switched capacitor branch comprising a first set of switched capacitors, a second switched capacitor branch comprising a second set of switched capacitors, a first operational amplifier, and a first capacitor coupled between an output of the first operational amplifier and an input of the first operational amplifier, wherein the first switched capacitor branch receives a first input signal and the second switched capacitor branch receives a second input signal; and
a second analog block coupled to the second input, the second analog block comprising a third switched capacitor branch comprising a third set of switched capacitors, a fourth switched capacitor branch comprising a fourth set of switched capacitors, a second operational amplifier, and a second capacitor coupled between an output of the second operational amplifier and an input of the second operational amplifier, wherein the third switched capacitor branch receives a third input signal and the fourth switched capacitor branch receives a fourth input signal,
wherein, in response to the analog function being based on the single ended signaling, a first switch associated with the first switched capacitor branch or the second switched capacitor branch is configured to output a first single ended signal,
wherein, in response to the analog function being based on the differential signaling, both the first switch and a second switch associated with the third switched capacitor branch or the fourth switched capacitor branch are configured to output a differential signal, and
wherein, when the analog function is associated with the differential signal, the first analog block outputs a first complementary signal of the differential signal and the second analog block outputs a second complementary signal of the differential signal.

2. The apparatus of claim 1 , wherein the second switch is configured when the analog function is further associated with a second single ended signal, and wherein the first analog block outputs the first single ended signal using the first switched capacitor branch or the second switched capacitor branch and the second analog block outputs the second single ended signal using the third switched capacitor branch or the fourth switched capacitor branch.

3. The apparatus of claim 2 , wherein the second single ended signal is associated with a different voltage reference than the first single ended signal.

4. The apparatus of claim 1 , wherein the configuring of the switches is based on opening or closing of the switches.

5. The apparatus of claim 1 , wherein at least one switch of the first analog block is configured based on a number of bits associated with the analog function when the analog function is associated with the first single ended signal.

6. The apparatus of claim 1 , wherein at least one switch of the second analog block is configured to be closed when the analog function is associated with the signal ended signal and requires an additional input corresponding to the second analog block, and wherein the at least one switch is configured to be open when the analog function is associated with the signal ended signal and does not require the additional input.

7. The apparatus of claim 1 , wherein a positive terminal of the first operational amplifier of the first analog block and a positive terminal of the second operational amplifier of the second analog block are coupled to a same reference voltage signal by configuring of another switch of the first analog block and another switch of the second analog block.

8. A method comprising:
receiving a programming signal corresponding to an analog function that is based on either single ended signaling or differential signaling;
configuring a first analog block to receive a first input signal and a second input signal and to transmit a first output signal by configuring a first switch of the first analog block based on the analog function, wherein the first switch is associated with a first switched capacitor branch comprising a first set of switched capacitors, a second switched capacitor branch comprising a second set of switched capacitors, a first operational amplifier, and a first capacitor coupled between an output of the first operational amplifier and an input of the first operational amplifier, wherein the first switched capacitor branch receives the first input signal and the second switched capacitor branch receives the second input signal; and
configuring a second analog block to receive a third input signal and a fourth input signal and to transmit a second output signal by configuring a second switch of the second analog block based on the analog function, wherein the second switch is associated with a third switched capacitor branch comprising a third set of switched capacitors, a fourth switched capacitor branch comprising a fourth set of switched capacitors, a second operational amplifier, and a second capacitor coupled between an output of the second operational amplifier and an input of the second operational amplifier, wherein the third switched capacitor branch receives the third input signal and the fourth switched capacitor branch receives the fourth input signal,
wherein, in response to the analog function being based on the single ended signaling, the first switch is configured to output a first single ended output signal comprising the first output signal and, in response to the analog function being based on the differential signaling, both the first switch and the second switch are configured to output a differential output signal comprising the first output signal and the second output signal, and
wherein, when the analog function is associated with the differential output signal, the first output signal is a first complementary signal of the differential output signal and the second output signal is a second complementary signal of the differential output signal.

9. The method of claim 8 , wherein the second switch is configured when the analog function is further associated with a second single ended output signal, and wherein the first analog block outputs the first single ended signal using the first switched capacitor branch or the second switched capacitor branch and the second analog block outputs the second single ended signal using the switched capacitor branch or the second switched capacitor branch.

10. The method of claim 9 , wherein the second single ended output signal is associated with a different voltage reference than the first single ended output signal.

11. The method of claim 8 , wherein the configuring of the first switch is based on opening or closing of the first switch.

12. The method of claim 8 , wherein at least one switch of the first analog block is configured based on a number of bits associated with the analog function when the analog function is associated with the first single ended output signal.

13. The method of claim 8 , wherein the second switch is configured to be closed when the analog function requires an additional input corresponding to the second analog block, and wherein the second switch is configured to be open when the analog function does not require the additional input.

14. The method of claim 8 , wherein the configuring of the first analog block and the configuring of the second analog block comprises a positive terminal of the first operational

Assignees

• Cypress Semiconductor Corp

Inventors

• Thiagarajan Eashwar
• Kutz Harold
• Johal Jaskarn Singh
• Hancioglu Erhan
• Klein Hans
• Byrkett Bruce
• Hastings Mark
• Seguine Dennis
• Castor-Perry Kendall
• Mar Monte
• Rohilla Gajender

Classifications

• H03M1/442

  using switched capacitors · CPC title

• H03K17/00 Primary

  Electronic switching or gating, i.e. not by contact-making and –breaking (gated amplifiers H03F3/72; switching arrangements for exchange systems using static devices H04Q3/52) · CPC title

• H03M1/468

  in which the input S/H circuit is merged with the feedback DAC array · CPC title

• H03M1/068

  the original and additional components or elements being complementary to each other, e.g. CMOS · CPC title

• H03F3/005 Primary

  using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers (H03F3/45 takes precedence) · CPC title