Resistive memory device having field enhanced features

Patent metadata

Field	Value
Publication number	US-9997703-B2
Application number	US-201314898380-A
Country	US
Kind code	B2
Filing date	Jul 25, 2013
Priority date	Jul 25, 2013
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

First claim

What is claimed is:

1. A resistive memory device including:
a bottom electrode and a top electrode;
a field enhancement (FE) feature that extends from the bottom electrode toward the top electrode, the FE feature to effect an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature;
a planar interlayer dielectric surrounding the FE feature and supporting the top electrode; and
a switching layer extending between the top electrode and the FE feature on the bottom electrode;
wherein the switching layer covers the FE feature with portions of the interlayer dielectric extending between the switching layer and the top electrode on either side of the FE feature.

2. The resistive memory device of claim 1 , comprising a memristive device.

3. The resistive memory device of claim 1 , wherein the switching layer comprises a transition metal oxide selected from the group consisting of tantalum oxide, titanium oxide, yttrium oxide, hafnium oxide, niobium oxide, and zirconium oxide, or a non-transition metal oxide selected from the group consisting of aluminum oxide, calcium oxide, magnesium oxide, dysprosium oxide, lanthanum oxide, and silicon dioxide, or a transition metal nitride selected from the group consisting of tantalum nitride and titanium nitride.

4. The resistive memory device of claim 1 , wherein the two electrodes are independently selected from the group consisting of aluminum, copper, platinum, tungsten, gold, titanium, silver, ruthenium dioxide, titanium nitride, tungsten nitride, tantalum, and tantalum nitride.

5. The resistive memory device of claim 1 , further including a diffusion barrier over the bottom electrode, the switching layer being disposed over the diffusion barrier, a non-linear select element between the switching layer and the top electrode.

6. The resistive memory device of claim 5 , wherein the interlayer dielectric isolates one device from a neighboring device, the interlayer dielectric comprising a polymeric material.

7. The resistive memory device of claim 1 , wherein the FE feature is formed of a material selected from the group consisting of an oxide, silicon, polysilicon, a nitride and a metal.

8. The resistive memory device of claim 1 , wherein the FE feature has a shape selected from the group consisting of:
a shape defined by a base disposed on the bottom electrode and a cross-section that tapers to a point above the bottom electrode; and
a shape defined by a pore of a polymer layer that is removed after the FE feature is formed on the bottom electrode.

9. The resistive memory device of claim 1 , wherein the FE feature effects the electric field between the two electrodes such that a lower voltage will be sufficient to change a resistance state of the switching layer than if the FE feature were not present.

10. The resistive memory device of claim 1 , wherein the FE feature comprises multiple features on the bottom electrode extending toward the top electrode.

Assignees

• Hewlett Packard Development Co
• Hewlett Packard Entpr Dev Lp

Inventors

• Lam Si-Ty
• Sheng Xia
• Henze Richard H
• Zhou Zhang-Lin

Classifications

• H01L45/16

  Electricity · mapped topic

• H01L27/2463

  Electricity · mapped topic

• H01L45/1233

  Electricity · mapped topic

• H01L45/1675

  Electricity · mapped topic

• H01L45/1273 Primary

  Electricity · mapped topic