Coated bond wires for die packages and methods of manufacturing said coated bond wires

Patent metadata

Field	Value
Publication number	US-9997489-B2
Application number	US-201414902183-A
Country	US
Kind code	B2
Filing date	Jul 2, 2014
Priority date	Jul 3, 2013
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A bond wire having a metal core, a dielectric layer, and a ground connectable metallization, wherein the bond wire has one or more vapor barrier coatings. Further, the present invention relates to a die package with at least one bond wire according to the invention.

First claim

Thus, having described the invention, what is claimed is:

1. A lead having a metal core, a dielectric layer at least partially surrounding the metal core, the dielectric being only partially surrounded by a ground connectable metal coating, wherein the lead further has at least one vapor barrier coating protecting areas that are not covered by metal.

2. The lead of claim 1 , wherein the lead includes additional metal layers and/or additional dielectric layers.

3. The lead of claim 1 , wherein the lead has multiple layers of dielectric of varying thickness, which are separated by thin metal layers, with the outermost layer being connected to ground.

4. The lead of claim 1 , wherein a high performance dielectric providing a superior vapor barrier and/or oxygen degradation resistance is thinly deposited over a thick layer of another dielectric material.

5. A die package comprising
a die having a plurality of connection pads;
a die substrate supporting a plurality of connection elements; and
one or more leads according to any of the preceding claims connected between the die and the die substrate.

6. The die package of any of claim 5 , wherein the die is overmolded, cured, and/or singulated for use.

7. The lead of claim 1 , including an additional coating to promote adhesion to mold compounds.

8. A lead having a metal core, a dielectric layer at least partially surrounding the metal core, the dielectric being only partially surrounded by a ground connectable metal coating, wherein the lead further has at least one vapor barrier coating covering areas that are not covered by metal.

Assignees

• Rosenberger Hochfrequenztechnik Gmbh & Co Kg

Inventors

• Cahill Sean S
• Sanjuan Eric A

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07554

  changes in dispositions · CPC title

• H10W72/07552

  changes in structures or sizes · CPC title