Methods of forming configurable microchannels in package structures

Patent metadata

Field	Value
Publication number	US-9997377-B2
Application number	US-201213714582-A
Country	US
Kind code	B2
Filing date	Dec 14, 2012
Priority date	Dec 14, 2012
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include forming a sacrificial microchannel material on a device, forming an overmold material on the sacrificial microchannel material, and vaporizing the sacrificial microchannel material to form microchannel structures in the overmold that are conformal to the surfaces of the device.

First claim

What is claimed is:

1. A package structure comprising:
a plurality of devices disposed on a substrate, wherein the plurality of devices comprise different heights; and
a plurality of hollow microchannel structures disposed directly on the devices, wherein a fluid is capable of flowing through the plurality of hollow microchannel structures to cool the plurality of devices, wherein the plurality of hollow microchannel structures are disposed within an epoxy overmold disposed on the plurality of devices, wherein the plurality of hollow microchannel structures conform to a top surface and a side surface of the plurality of devices.

2. The package structure of claim 1 wherein individual ones of the plurality of hollow microchannel structures are conformal with individual ones of the devices.

3. The package structure of claim 1 further comprising wherein the substrate comprises a 3D package substrate.

4. The package structure of claim 1 further comprising manifolds adjacent the hollow microchannel structures, and disposed within the epoxy overmold, wherein the manifolds are capable of providing entry and exit of cooling fluid.

5. The package structure of claim 1 further comprising wherein the devices do not comprise the same heights as each other.

6. The package structure of claim 1 further comprising wherein the package structure does not comprise a TIM and does not comprise an integrated heat structure.

7. The package structure of claim 1 further comprising wherein the plurality of hollow microchannels are disposed in at least one direction across the device, and wherein the at least one direction comprises at least one of vertical, horizontal and angular directions.

8. The package structure of claim 1 further comprising wherein the plurality of hollow microchannel structures are disposed on the plurality of devices in a plurality of lines comprising a width and a length, and wherein adjacent hollow microchannel structures are not contiguous.

9. The package structure of claim 1 further comprising wherein individual ones of the plurality of devices are capable of being cooled at different temperatures from each other.

10. A package structure comprising:
a package substrate;
a device disposed on the package substrate; and
an overmold disposed on the device, wherein the overmold comprises a microchannel structure that is conformal over a top surface and a side surface of the device.

11. The package structure of claim 10 further comprising wherein the package structure comprises a 3D package structure.

12. The structure of claim 10 further comprising further comprising manifolds adjacent the microchannel structure and disposed within the overmold, wherein the manifolds are capable of providing entry and exit of cooling fluid to cool the device.

13. The structure of claim 10 wherein the device comprises at least one of a CPU, a logic device and a memory device.

14. The structure of claim 10 further comprising a system comprising:
a bus communicatively coupled to the package structure; and

an eDRAM communicatively coupled to the bus.

15. A package structure comprising:
a plurality of devices disposed on a substrate, wherein the plurality of devices comprise different heights; and
a plurality of microchannel structures disposed on the devices, wherein the plurality of microchannel structures are disposed within an overmold disposed on the plurality of devices, and wherein the plurality of microchannel structures conform to a top surface and a side surface of the plurality of devices.

16. The package structure of claim 15 wherein individual ones of the plurality of microchannel structures are conformal with individual ones of the devices.

17. The package structure of claim 15 further comprising wherein the substrate comprises a 3D package substrate.

18. The package structure of claim 15 further comprising manifolds adjacent the microchannel structures, and disposed within the overmold, wherein the manifolds are capable of providing entry and exit of cooling fluid.

19. The package structure of claim 15 further comprising wherein the devices do not comprise the same heights as each other.

20. The package structure of claim 19 further comprising wherein the package structure does not comprise a TIM and does not comprise an integrated heat structure.

21. The package structure of claim 15 further comprising wherein the plurality of microchannels are disposed in at least one direction across the device, and wherein the at least one direction comprises at least one of vertical, horizontal and angular directions.

22. The package structure of claim 15 further comprising wherein a fluid is capable of flowing through the plurality of microchannel structures to cool the plurality of devices.

23. The package structure of claim 15 further comprising wherein the plurality of microchannel structures are disposed on the plurality of devices in a plurality of lines comprising a width and a length, and wherein adjacent microchannel structures are not contiguous.

24. The package structure of claim 15 further comprising wherein individual ones of the plurality of devices are capable of being cooled at different temperatures from each other.

Assignees

• Intel Corp

Inventors

• Choudhury Arnab

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/014

  using batch processing · CPC title

• H10W70/02

  of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04) · CPC title

• H10W40/47

  by flowing liquids, e.g. forced water cooling · CPC title