Memory devices and their operation having trim registers associated with access operation commands

Patent metadata

Field	Value
Publication number	US-9997246-B2
Application number	US-201615015424-A
Country	US
Kind code	B2
Filing date	Feb 4, 2016
Priority date	Dec 21, 2012
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

Methods including performing an access operation on a memory device using trims corresponding to trim settings, receiving a command to suspend the access operation, loading updated trim settings into a particular trim register of the memory device, setting updated trims for the access operation in response to the updated trim settings of the particular trim register, and resuming the access operation using the updated trims. Apparatus including an external controller and a memory device having an internal controller configured to set trims in response to trim settings and to perform an access operation on an array of memory cells using the trims in response to receiving the access command, wherein the external controller is configured to select trim settings corresponding to a desired mode of operation, and to transmit the selected trim settings to the memory device.

First claim

What is claimed is:

1. A method, comprising:
performing an access operation on a memory device using trims corresponding to trim settings;
receiving a command at the memory device to suspend the access operation;
after receiving the command to suspend the access operation, suspending the access operation;
after suspending the access operation, receiving a command at the memory device to load updated trim settings, wherein the command to load the updated trim settings is associated with the updated trim settings to be received by the memory device;
after receiving the command to load the updated trim settings and receiving the updated trim settings, loading the updated trim settings into a particular trim register of the memory device;
setting updated trims for the access operation in response to the updated trim settings in the particular trim register; and
resuming the suspended access operation using the updated trims.

2. The method of claim 1 , further comprising:
receiving a command at the memory device for the access operation; and
setting the trims in response to the trim settings prior to performing the access operation.

3. The method of claim 2 , further comprising loading a trim register with the trim settings prior to setting the trims.

4. The method of claim 3 , further comprising loading the trim register with the trim settings in response to receiving the command for the access operation.

5. The method of claim 1 , wherein resuming the suspended access operation comprises resuming the suspended access operation in response to receiving a command at the memory device to resume the suspended access operation.

6. The method of claim 1 , wherein resuming the suspended access operation comprises resuming the suspended access operation in response to completion of an operation initiated after receiving the command to suspend the access operation.

7. A method, comprising:
receiving a command at a memory device to perform an access operation on a grouping of memory cells of an array of memory cells of the memory device;
setting trims in response to trim settings;
performing the access operation on the grouping of memory cells using the trims;
receiving a command at the memory device to suspend the access operation; after receiving the command to suspend the access operation, suspending the access operation;
after suspending the access operation, receiving a command at the memory device to load updated trim settings, wherein the command to load the updated trim settings is associated with the updated trim settings to be received by the memory device;
after receiving the command to load the updated trim settings and receiving the updated trim settings, loading the updated trim settings into a particular trim register of the memory device;
setting updated trims for the access operation in response to the updated trim settings in the particular trim register; and
resuming the suspended access operation using the updated trims in response to a criteria selected from a group consisting of receiving a command to resume the suspended access operation, and completion of an intervening access operation performed while the access operation is suspended.

8. The method of claim 7 , further comprising storing the trim settings to the particular trim register prior to loading the updated trim settings into the particular trim register.

9. The method of claim 8 , further comprising loading the updated trim settings into the particular trim register in response to the command to load the updated trim settings, wherein the command to load the updated trim settings is a different command received by the memory device than the command to suspend the access operation.

10. The method of claim 7 , further comprising:
receiving a subsequent command to perform the intervening operation on a different grouping of memory cells of the array of memory cells while the access operation is suspended; and
performing the intervening operation on the different grouping of memory cells.

11. A method, comprising:
receiving a command to perform an access operation on a grouping of memory cells of an array of memory cells of a memory device;
setting trims in response to trim settings;
performing the access operation on the grouping of memory cells using the trims;
receiving a command to suspend the access operation;
loading updated trim settings into a particular trim register of the memory device in response to the command to suspend the access operation;
setting updated trims for the access operation in response to the updated trim settings of the particular trim register; and
resuming the access operation using the updated trims in response to a criteria selected from a group consisting of receiving a command to resume the suspended access operation, and completion of an intervening operation performed while the access operation is suspended.

12. The method of claim 11 , wherein setting the trims in response to the trim settings comprises setting parameters to be utilized by the memory device to perform the access operation on the grouping of memory cells in response to the trim settings.

13. The method of claim 12 , wherein setting parameters to be utilized by the memory device to perform the access operation comprises setting at least one parameter selected from a group consisting of voltages to be applied during the access operation, voltage differentials to be utilized during the access operation, and quantities to be utilized during the access operation.

14. The method of claim 11 , wherein setting the updated trims for the access operation is further in response to the selected criteria for resuming the suspended access operation.

15. A method, comprising:
performing an access operation on a memory device using trims corresponding to trim settings;
receiving a command to suspend the access operation;
storing the trim settings to a particular trim register of the memory device in response to receiving the command to suspend the access operation;
loading updated trim settings into the particular trim register;
setting updated trims for the access operation in response to the updated trim settings in the particular trim register; and
resuming the access operation using the updated trims.

16. The method of claim 11 , further comprising:
loading a trim register associated with the command to perform the access operation with the trim settings while the memory device is performing a prior access operation on a different grouping of memory cells of the array of memory cells.

17. A method, comprising:
receiving a command to perform a particular access operation on a grouping of memory cells of an array of memory cells of a memory device;
setting trims in response to trim settings;
performing the particular access operation on the grouping of memory cells using the trims;
receiving a command to suspend the particular access operation;
after receiving the command to suspend the particular access operation, suspending the particular access operation, after suspending the particular access operation, receiving updated trim settings from a device external to the memory device, and loading the updated trim settings into a particular trim register of the memory device;
setting updated trims for the particular access operation in response to the updated trim settings in the particular trim register;
resuming the suspended particular access operation using the updated trims in response to a criteria selected from a group consisting of receiving a command to resume t

Assignees

• Micron Technology Inc

Inventors

• Grunzke Terry

Classifications

• G11C16/0483 Primary

  comprising cells having several storage transistors connected in series · CPC title

• G11C16/06

  Auxiliary circuits, e.g. for writing into memory · CPC title

• G06F2212/7207

  management of metadata or control data · CPC title

• G11C2029/4402

  Internal storage of test result, quality data, chip identification, repair information · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title