Storage system with solid-state storage device having enhanced write bandwidth operating mode

Patent metadata

Field	Value
Publication number	US-9996291-B1
Application number	US-201615223479-A
Country	US
Kind code	B1
Filing date	Jul 29, 2016
Priority date	Jul 29, 2016
Publication date	Jun 12, 2018
Grant date	Jun 12, 2018

Abstract

A storage system in one embodiment comprises a host processor, a volatile memory associated with the host processor, and a solid-state storage device comprising a non-volatile memory. The host processor is configured to detect a particular power condition, such as a power failure condition, and responsive to the detected power condition to direct the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device. In conjunction with directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device, the host processor further directs the solid-state storage device to enter an enhanced write bandwidth operating mode in which the solid-state storage device temporarily at least partially suspends at least one specified background process that would otherwise tend to restrict an achievable write bandwidth of the solid-state storage device.

First claim

What is claimed is:

1. A storage system comprising:
a host processor;
a volatile memory associated with the host processor;
a solid-state storage device coupled to the host processor and comprising a non-volatile memory;
wherein the host processor is configured to detect a particular power condition and responsive to the detected power condition to direct the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device;
wherein in conjunction with directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device, the host processor further directs the solid-state storage device to enter an enhanced write bandwidth operating mode in which the solid-state storage device temporarily at least partially suspends at least one specified background process that would otherwise tend to restrict an achievable write bandwidth of the solid-state storage device; and
wherein the host processor in directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device directs that such copying occur utilizing a particular input-output block size selected to increase data transfer efficiency by reducing processing overhead.

2. The storage system of claim 1 wherein the power condition comprises one of a power failure condition and a power off condition.

3. The storage system of claim 1 further comprising a PCIe switch having an upstream port coupled to a given one of a plurality of root ports of a PCIe root complex of the host processor and a downstream port coupled to the solid-state storage device.

4. The storage system of claim 1 wherein the host processor in directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device generates one or more commands.

5. The storage system of claim 1 wherein the specified background process is temporarily at least partially suspended for a period of time that is greater than or equal to an amount of time required to complete the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device.

6. The storage system of claim 1 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a thermal throttling process in which the solid-state storage device reduces the achievable write bandwidth if a monitored temperature of the solid-state storage device is above a designated threshold.

7. The storage system of claim 1 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a wear leveling process in which data writes are distributed in an even pattern over portions of the non-volatile memory in order to prevent uneven utilization of those portions of the non-volatile memory.

8. The storage system of claim 1 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a garbage collection process in which portions of the non-volatile memory previously used for writing of data are identified as available memory space for writing of new data.

9. The storage system of claim 8 wherein the garbage collection process is partially suspended subject to a requirement that a minimum amount of available memory space be maintained within the solid-state storage device.

10. The storage system of claim 1 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a process of scanning for error correction code errors in at least a portion of the non-volatile memory.

11. The storage system of claim 1 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a process of enforcing read or write disturb data retention policies in at least a portion of the non-volatile memory.

12. The storage system of claim 1 wherein the solid-state storage device in the enhanced write bandwidth operating mode temporarily completely suspends multiple specified background processes that would otherwise tend to restrict an achievable write bandwidth of the solid-state storage device.

13. The storage system of claim 1 wherein the solid-state storage device provides an acknowledgment to the host processor indicating that it has completed the copying of the data into the non-volatile memory.

14. A method comprising:
detecting a particular power condition in a host processor of a storage system;
responsive to the detected power condition, directing the copying of data from a volatile memory associated with the host processor to a non-volatile memory of a solid-state storage device of the storage system; and
in conjunction with directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device, directing the solid-state storage device to enter an enhanced write bandwidth operating mode in which the solid-state storage device temporarily at least partially suspends at least one specified background process that would otherwise tend to restrict an achievable write bandwidth of the solid-state storage device;
wherein directing the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device comprises directing that such copying occur utilizing a particular input-output block size selected to increase data transfer efficiency by reducing processing overhead.

15. The method of claim 14 wherein the specified background process is temporarily at least partially suspended for a period of time that is greater than or equal to an amount of time required to complete the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device.

16. The method of claim 14 wherein the specified background process that is temporarily at least partially suspended by the solid-state storage device in the enhanced write bandwidth operating mode comprises a thermal throttling process in which the solid-state storage device reduces the achievable write bandwidth if a monitored temperature of the solid-state storage device is above a designated threshold.

17. A computer program product comprising a non-transitory processor-readable storage medium having stored therein program code of one or more software programs, wherein the program code, when executed by a storage system comprising a host processor, a volatile memory associated with the host processor, and a solid-state storage device comprising a non-volatile memory, causes the storage system:
to detect a particular power condition in the host processor;
responsive to the detected power condition, to direct the copying of data from the volatile memory associated with the host processor to the non-volatile memory of the solid-state storage device; and
in conjunction with directing the copying of data from the volatile memory associated with the host

Assignees

• Emc Corp
• Emc Ip Holding Co Llc

Inventors

• Izhar Amnon
• Weiler Patrick

Classifications

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0619 Primary

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F3/0634

  by changing the state or mode of one or more devices · CPC title

• G06F3/065

  Replication mechanisms · CPC title