Integrated MEMS pressure sensor and MEMS inertial sensor
US-9550668-B1 · Jan 24, 2017 · US
US9994441B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9994441-B2 |
| Application number | US-201615339149-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 31, 2016 |
| Priority date | Jul 17, 2014 |
| Publication date | Jun 12, 2018 |
| Grant date | Jun 12, 2018 |
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For an optical electronic device and method that forms cavities through an interposer wafer after bonding the interposer wafer to a window wafer, the cavities are etched into the bonded interposer/window wafer pair using the anti-reflective coating of the window wafer as an etch stop. After formation of the cavities, the bonded interposer/window wafer pair is bonded peripherally of die areas to the MEMS device wafer, with die area micromechanical elements sealed within respectively corresponding ones of the cavities.
Opening claim text (preview).
What is claimed is: 1. A method of fabricating a packaged MEMS device, comprising: providing an interposer wafer having a silicon substrate with first and second silicon oxide layers respectively thermally grown over top and bottom surfaces of the silicon substrate; providing a window wafer having a glass substrate with first and second anti-reflective coatings formed over top and bottom surfaces of the glass substrate; forming a third silicon oxide layer over the first anti-reflective coating; bonding the interposer and window wafers at the first and third silicon oxide layers; selectively etching portions of the second silicon oxide layer down to the silicon substrate to define a first end of a cavity; selectively etching portions of the silicon substrate down to the first silicon oxide layer to define the cavity through the semiconductor substrate; and selectively etching portions of the first and third silicon oxide layers down to the first anti-reflective coating to define a second end of the cavity, the first anti-reflective coating serving as an etch stop relative to an etchant used to etch the first and third silicon oxide layers. 2. The method of claim 1 , wherein the first and second anti-reflective coatings comprise at least one of an alkaline earth Group I or II metal fluoride, a lanthanide metal fluoride or an actinide metal fluoride. 3. The method of claim 2 , wherein the anti-reflective coatings comprise at least one of magnesium fluoride (MgF 2 ), yttrium fluoride (YF 3 ) or ytterbium fluoride (YbF 3 ). 4. The method of claim 2 , wherein the etchant comprises at least one of a fluorocarbon dry etch or a buffered oxide (NH 4 F/HF mixture) wet etch. 5. The method of claim 2 , wherein the window wafer further comprises apertures formed over the glass substrate under the third silicon oxide layer. 6. The method of claim 2 , further comprising providing a MEMS device wafer having die areas with micromechanical elements and microelectronic elements under the micromechanical elements; and bonding the interposer wafer to the MEMS wafer at locations peripherally of the die areas with the micromechanical elements contained within the cavity. 7. The method of claim 6 , wherein selectively etching portions of the silicon substrate down to the first silicon oxide layer defines the cavity with sidewalls that slope inwardly through the silicon substrate in a direction from the first to the second ends.
Cavities · CPC title
by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal · CPC title
Hermetically sealing an opening in the lid · CPC title
Multilayers · CPC title
Using a carrier for applying a plurality of packaging lids to the system wafer · CPC title
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