Dynamic range of wideband RF front end using delta sigma converters with envelope tracking and injected digitally equalized transmit signal

US9985809B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9985809-B2
Application numberUS-201515103310-A
CountryUS
Kind codeB2
Filing dateNov 6, 2015
Priority dateNov 6, 2014
Publication dateMay 29, 2018
Grant dateMay 29, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a receiver module having a plurality of signal channels for different frequency bands, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The architecture also includes a transmitter module having a transmitter delta-sigma modulator for converting digital data bits to analog transmit signals, where the transmitter module includes a power amplifier and a switch for directing the transmit signals to one of the signal paths. The architecture also includes a dual self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module.

First claim

Opening claim text (preview).

What is claimed is: 1. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising: an antenna structure operable to transmit signals and receive signals; a multiplexer coupled to the antenna structure and including a plurality of signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals; a combiner in each signal path being responsive to the receive signal; a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal; a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals; and a self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module via a two-part cancellation signal provided to the combiner, said self-cancellation circuit including a digital cancellation processor receiving digital bits from the transmitter delta-sigma modulator, said cancellation processor controlling the bits to put them in phase with the transmit signal, and a digital-to-analog converter (DAC) receiving the phase controlled bits from the cancellation processor, and providing an analog digital cancellation signal to the combiner to be coupled with the receive signal, wherein the self-cancellation circuit includes an analog self-cancellation circuit having an RF cancellation and envelope tracking circuit receiving a portion of the transmit signal, and providing an RF cancellation signal to the combiner to be coupled with the receive signal. 2. The transceiver circuit according to claim 1 wherein the RF cancellation and envelope tracking circuit tracks the receive signal and the transmit signal and provides a modulation signal to a power amplifier in the transmit module to provide a copy of a reflected transmit signal. 3. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising: an antenna structure operable to transmit signals and receive signals; a multiplexer coupled to the antenna structure and including a plurality of signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals; a combiner in each signal path being responsive to the receive signal; a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal; a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a switch for directing the transmit signals to a particular signal path, and a power amplifier for each signal path and for amplifying the transmit signal before transmitting; and a dual self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module, said self-cancellation circuit including a digital cancellation processor receiving digital bits from the transmitter delta-sigma modulator, said cancellation processor controlling the bits to put them in phase with the transmit signal, and a digital-to-analog converter (DAC) receiving the phase controlled bits from the cancellation processor, and providing an analog digital cancellation signal to the combiner to be coupled with the receive signal, said self-cancellation circuit also including an RF cancellation and envelope tracking circuit receiving a portion of the transmit signal, and providing an RF cancellation signal to the combiner to be coupled with the receive signal. 4. The transceiver circuit according to claim 3 wherein the RF cancellation and envelope tracking circuit tracks the receive signal and the transmit signal and provides a modulation signal to the power amplifier to provide a copy of a reflected transmit signal. 5. The transceiver circuit according to claim 3 wherein each receiver delta-sigma modulator includes a low noise amplifier (LNA), an LC filter and a quantizer circuit, and wherein the quantizer circuit receives a filtered error signal from the LC filter and provides an estimation of the receive signal. 6. The transceiver circuit according to claim 5 wherein the combiner receives the estimation of the receive signal from the quantizer circuit and provides an error signal, said error signal being provided to the LNA and an amplified error signal from the LNA being provided to the LC filter. 7. The transceiver circuit according to claim 5 wherein each signal channel includes a summation node that receives an amplified receive signal from the LNA and the estimation of the receive signal from the quantizer circuit and provides an error signal to the LC filter. 8. The transceiver circuit according to claim 5 wherein the LC filter is a sixth-order filter. 9. The transceiver circuit according to claim 5 wherein the quantizer circuit is an interleaving quantizer circuit that interleaves multiple groups of bits from the filter. 10. The transceiver circuit according to claim 9 wherein the quantizer circuit includes a plurality of groups of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs), wherein the ADCs receive the filtered error signal from the filter, and wherein the bits from the ADCs are provided to the DACs in the interleaving process, and wherein the output of the DACs is provided to the combiner. 11. The transceiver circuit according to claim 3 wherein the transceiver circuit employs both SiGe and CMOS technologies. 12. The transceiver circuit according to claim 3 wherein the cellular radio is a vehicle cellular radio. 13. The transceiver circuit according to claim 3 wherein the multiplexer is a triplexer and the plurality of signal paths in three signal paths. 14. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising: an antenna structure operable to transmit signals and receive signals; a multiplexer coupled to the antenna structure and including a plurality of signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals; a combiner in each signal path being responsive to the receive signal; a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal; a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a switch for directing the transmit signals to a particular signal path, and a power amplifier for each signal path and for amplifying the transmit signal before transmitting; and a self-cancellation circuit providing digital and analog cancellation of the transmit signal in the receiver module via a two-part cancellation signal provided to the combiner, said self

Assignees

Inventors

Classifications

  • analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line (duplex arrangements H04L5/143) · CPC title

  • using differential modulation, e.g. delta modulation · CPC title

  • the modulator having a higher order loop filter in the feedforward path · CPC title

  • Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title

  • Details of the digital/analogue conversion in the feedback path · CPC title

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What does patent US9985809B2 cover?
A cellular radio architecture that includes a programmable bandpass sampling radio frequency front-end and an optimized digital baseband. The architecture includes a receiver module having a plurality of signal channels for different frequency bands, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representativ…
Who is the assignee on this patent?
Gm Global Tech Operations Llc
What technology area does this patent fall under?
Primary CPC classification H04L27/0002. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 29 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).