Front end circuit

Patent metadata

Field	Value
Publication number	US-9985586-B2
Application number	US-201615073897-A
Country	US
Kind code	B2
Filing date	Mar 18, 2016
Priority date	May 29, 2015
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

A front end circuit includes a bypass circuit comprising a first bypass switch and a second bypass switch configured to bypass a signal to a first terminal according to switching operations of the first bypass switch and the second bypass switch; and an amplifier connected in parallel to the bypass circuit and configured to amplify the signal.

First claim

What is claimed is:

1. A front end circuit, comprising:
a bypass circuit comprising a first bypass switch and a second bypass switch configured to bypass a signal to an output terminal according to switching operations of the first bypass switch and the second bypass switch, comprising a reducer configured to reduce the signal, the reducer comprising
a first resistor, a first end of which is connected to a second end of the first bypass switch and a second end of which is connected to a first end of the second bypass switch,
a second resistor, a first end of which is connected to the first end of the first resistor and a second end of which is grounded, and
a third resistor, a first end of which is connected to the second end of the first resistor and a second end of which is grounded; and
an amplifier connected in parallel to the bypass circuit and configured to amplify the signal.

2. The front end circuit of claim 1 , wherein a first end of the first bypass switch is connected to an input terminal, a first end of the reducer is connected to the second end of the first bypass switch, the first end of the second bypass switch is connected to a second end of the reducer, and a second end of the second bypass switch is connected to the output terminal.

3. The front end circuit of claim 1 , wherein the first bypass switch and the second bypass switch are configured to receive a same switching control signal to perform the switching operations.

4. The front end circuit of claim 1 , wherein the first bypass switch and the second bypass switch are configured to match either one or both of input impedance and output impedance of the bypass circuit to about 50 ohms.

5. The front end circuit of claim 4 , wherein each of the first bypass switch and the second bypass switch comprises stacked intercoupled switches.

6. The front end circuit of claim 1 , wherein the amplifier comprises:
a first amplifying switch, a first end of which is connected to an input terminal configured to receive the signal;
an amplifying part, a first end of which is connected to a second end of the first amplifying switch, the amplifying part being configured to amplify the signal; and
a second amplifying switch, a first end of which is connected to a second end of the amplifying part, a second end of the second amplifying switch being connected to the output terminal.

7. The front end circuit of claim 1 , wherein the amplifier comprises:
a first amplifying switch, a first end of which is connected to an input terminal configured to receive the signal;
a first amplifying part, a gate terminal of which is connected to a second end of the first amplifying switch, a source terminal of the first amplifying part being grounded;
a second amplifying part, a source terminal of which is connected to a drain terminal of the first amplifying switch, a drain terminal of the second amplifying part being connected to the output terminal; and
a second amplifying switch, a first end of which is connected to a second end of the second amplifying part and a second end of which is connected to the output terminal.

8. The front end circuit of claim 6 , wherein the first and second amplifying switches are configured to match either one or both of input impedance and output impedance of the amplifying part to about 50 ohms.

9. The front end circuit of claim 1 , further comprising a transmission and reception switch, a first end of which is connected to an input terminal and a second end of which is connected to the amplifier and the bypass circuit.

10. The front end circuit of claim 9 , wherein the transmission and reception switch is configured to maintain an ON state in response to the front end circuit performing a reception operation.

11. A front end circuit, comprising:
a bypass circuit configured to bypass a signal to an output terminal; and
an amplifier connected in parallel to the bypass circuit and configured to amplify the signal,
wherein the amplifier comprises
a first amplifying switch, a first end of which is connected to an input terminal configured to receive the signal,
a first amplifying part, a gate terminal of which is connected to a second end of the first amplifying switch, a source terminal of the first amplifying part being grounded,
a second amplifying part, a source terminal of which is connected to a drain terminal of the first amplifying switch, a drain terminal of the second amplifying part being connected to the output terminal, and
a second amplifying switch, a first end of which is connected to a second end of the second amplifying part and a second end of which is connected to the output terminal.

Assignees

• Samsung Electro Mech

Inventors

• Kim Sang Hee

Classifications

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F3/72

  Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal · CPC title

• H03F2203/7236

  the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers by (a ) switch(es) · CPC title

• H04B1/38

  Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving · CPC title

• H03F2203/7233

  the gated amplifier, switched on or off by putting into parallel or not, by choosing between amplifiers by one or more switch(es), being impedance adapted by switching an adapted passive network · CPC title