Phase changing on-chip thermal heat sink

Patent metadata

Field	Value
Publication number	US-9984954-B2
Application number	US-201514928206-A
Country	US
Kind code	B2
Filing date	Oct 30, 2015
Priority date	Dec 31, 2012
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

A method of forming an on-chip heat sink includes forming a device on a substrate. The method also includes forming a plurality of insulator layers over the device. The method further includes forming a heat sink in at least one of the plurality of insulator layers and proximate to the device. The heat sink includes a reservoir of phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip.

First claim

What is claimed:

1. A semiconductor structure, comprising:
a device directly on a substrate of an integrated circuit chip, wherein the substrate is composed of a semiconductor material comprising silicon;
a heat sink proximate to the device, wherein the heat sink is completely contained in one or more insulator layers over the device; and
an external heat sink thermally connected to the heat sink,
wherein the heat sink comprises a liner encapsulating a core that is composed of a phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip; and
the liner comprises a bottom, sidewalls, and a cap, with a top surface of the cap being coplanar with a top surface of an uppermost one of the one or more insulator layers,
further comprising electrically conductive elements in the one or more insulator layers that provide an electrically conductive pathway to the device, wherein:
a first one of the electrically conductive elements contacts and extends vertically from the device;
a second one of the electrically conductive elements contacts and extends horizontally from the first one of the electrically conductive element; and
the bottom of the liner directly contacts a top of one of the second one of the electrically conductive elements.

2. The structure of claim 1 , wherein the phase change material comprises an alloy comprising gallium (Ga) and at least one of indium (In), zinc (Zn), tin (Sn), gold (Au), and copper (Cu).

3. The structure of claim 2 , wherein the alloy has a melting point temperature in a range of 50° C. to 100° C.

4. The structure of claim 1 , wherein the external heat sink contacts the liner and comprises:
a horizontal section that contacts an upper horizontal surface of the liner; and
plural vertical protrusions extending vertically upward from the horizontal section.

5. The structure of claim 1 , further comprising plural thermal links arranged vertically and parallel to one another in an upper insulator layer between the liner and the external heat sink, wherein the upper insulator layer is a last wiring level and the external heat sink is connected externally to the integrated circuit chip.

6. The structure of claim 1 , wherein the heat sink is completely contained in one or more insulator layers over the device, and further comprising an upper insulator layer directly on and contacting an uppermost one of the one or more insulator layers.

7. The structure of claim 1 , wherein the heat sink is spaced apart from the device by a distance of about 5 to 10 μm.

8. The structure of claim 1 , wherein the heat sink vertically overlaps the device.

9. The structure of claim 1 , wherein the design operating temperature of the chip is about 105° C., and the melting point temperature of the phase change material is in a range between about 50° C. and about 100° C.

10. The structure of claim 1 , wherein the device is a transistor formed on a contacting a top surface of the substrate.

11. The structure of claim 1 , wherein the one or more insulator layers comprise interlevel dielectric (ILD) layers composed of dielectric material comprising one of: silicon dioxide (SiO 2 ), tetraethylorthosilicate (TEOS), borophosphosilicate glass (BPSG), hydrogen silsesquioxane (HSQ).

12. The structure of claim 1 , wherein a lowermost surface of the one or more insulator layers directly contacts the substrate.

13. The structure of claim 1 , wherein an interface between the substrate and a lowermost surface of the one or more insulator layers is at a same level as an interface between the substrate and the device.

14. The structure of claim 1 , wherein the device is one of a power amplifier and a power diode.

15. The structure of claim 1 , wherein the phase change material comprises an alloy comprising gallium (Ga) and at least one of indium (In), zinc (Zn), tin (Sn), gold (Au), and copper (Cu), and a ratio of constituent elements of the alloy is adjusted to configure the melting point temperature to be in a range of about 50° C. to about 100° C.

16. A semiconductor structure, comprising:
a device directly on a substrate of an integrated circuit chip, wherein the device is one of a transistor, a power amplifier, and a power diode, and wherein the substrate is composed of a semiconductor material comprising silicon;
a heat sink proximate to the device and completely contained in one or more insulator layers over the device;
an external heat sink thermally connected to the heat sink, the external heat sink being connected externally to the integrated circuit chip; and
wherein the heat sink comprises a core that is composed of a phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip, the external heat sink comprises a pre-formed metal structure that includes: a horizontal section that contacts an upper horizontal surface of a liner encapsulating the core; and plural vertical protrusions extending vertically upward from the horizontal section, and
the phase change material comprises an alloy comprising gallium (Ga) and at least one of indium (In), zinc (Zn), tin (Sn), gold (Auk and copper (Cu), and a ratio of constituent elements of the alloy is adjusted to configure the melting point temperature to be in a range of about 50° C. to about 100° C., further comprising electrically conductive elements in the one or more insulator layers that provide an electrically conductive pathway to the device, wherein the bottom of the liner directly contacts a top of one of the electrically conductive elements.

17. The structure of claim 16 , wherein:
a lowermost surface of the one or more insulator layers directly contacts the substrate;
a first electrically conductive element contacts and extends vertically from the device;
a second electrically conductive element contacts and extends horizontally from the first electrically conductive element;
the heat sink comprises a liner encapsulating the core; and
a bottom of the liner directly contacts a top of the second electrically conductive element.

18. A semiconductor structure, comprising:
a device directly on a substrate of an integrated circuit chip, wherein the substrate is composed of a semiconductor material comprising silicon;
a heat sink proximate to the device, wherein the heat sink is completely contained in one or more insulator layers over the device; and
an external heat sink thermally connected to the heat sink,
wherein the heat sink comprises a liner encapsulating a core that is composed of a phase change material having a melting point temperature that is less than an upper limit of a design operating temperature of the chip;
the liner comprises a bottom, sidewalls, and a cap, with a top surface of the cap being coplanar with a top surface of an uppermost one of the one or more insulator layers; and
the bottom, the sidewalls, and the cap of the liner are each composed of a same electrically conductive material, further comprising electrically conductive elements in the one or more insulator layers that provide an electrically conductive pathway to the device, wherein the bottom of the liner directly contacts a top of one of the electrically conductive elements.

19. The structure of claim 18 , wherein the phase change material is composed of InGa.

20. The structure of claim 18 , wherein the phase change material comprises an alloy comprising gallium (Ga) and at least one of indium (In), zinc (Zn), tin (Sn),

Assignees

• IBM

Inventors

• Dahlstrom Mattias E

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W40/10

  Arrangements for heating · CPC title