Method of manufacturing semiconductor device with a multi-layered gate dielectric

US9984884B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9984884-B2
Application numberUS-201615385507-A
CountryUS
Kind codeB2
Filing dateDec 20, 2016
Priority dateJun 3, 2013
Publication dateMay 29, 2018
Grant dateMay 29, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor device includes forming a first nitride semiconductor layer, forming thereover a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer, and thereby forming a stacked body, etching the stacked body with a first film placed over the stacked body and including a first opening portion as a mask to form a trench penetrating through the second nitride semiconductor layer and reaching an inside of the first nitride semiconductor layer, causing an end portion of the first film to retreat from an end portion of the trench, forming a second film over the first film including the inside of the trench, and forming a gate electrode over the second film.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a semiconductor device, the method comprising: forming a first nitride semiconductor layer, forming thereover a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer, and thereby forming a stacked body; forming a first film, including a first opening portion, over the stacked body; forming a mask film over the first film, wherein the mask film is retreated from a first end of the first opening portion; etching the stacked body using a stacked film, comprising the first film and the mask film, as a mask to form a trench penetrating through the second nitride semiconductor layer and reaching an inside of the first nitride semiconductor layer; causing an end portion of the first film to retreat from an end portion of the trench by etching the first film with the mask film as a mask, and removing the mask film; after causing the end portion of the first film to retreat, forming a second film covering the first film and an inside of the trench; and forming a gate electrode over the second film. 2. The method of manufacturing a semiconductor device according to claim 1 , wherein causing the end portion of the first film to retreat includes causing the end portion of the first film to retreat by 0.2 μm or greater from the end portion of the trench. 3. The method of manufacturing a semiconductor device according to claim 1 , wherein the first film includes a film containing silicon nitride, and wherein the second film includes a film containing aluminum oxide.

Assignees

Inventors

Classifications

  • for Group V materials or Group III-V materials · CPC title

  • Nitrides · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material · CPC title

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9984884B2 cover?
A method of manufacturing a semiconductor device includes forming a first nitride semiconductor layer, forming thereover a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer, and thereby forming a stacked body, etching the stacked body with a first film placed over the stacked body and including a first opening portion as a mask to form…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/01358. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 29 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).