Synchronous rectification controller

Patent metadata

Field	Value
Publication number	US-9979309-B1
Application number	US-201715653924-A
Country	US
Kind code	B1
Filing date	Jul 19, 2017
Priority date	Jul 19, 2017
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

In one example, a circuit for controlling synchronous rectification includes a first current compensation module, a second current compensation module, and a control module. The first current compensation module is configured to provide a first current into parasitic capacitance at a drain pin when a drain of a synchronous rectifier draws current from the parasitic capacitance. The drain pin is coupled to the drain of the synchronous rectifier via a resistor. The first current compensation module is further configured to generate a triggering signal using the first current. The second current compensation module is configured to draw a second current from the parasitic capacitance when the drain of the synchronous rectifier provides current into the parasitic capacitance and generate an arming signal using the second current. The control module is configured to activate the synchronous rectifier using the triggering signal and the arming signal.

First claim

The invention claimed is:

1. A circuit for controlling synchronous rectification, the circuit comprising:
a first current compensation module configured to:
provide a first current into parasitic capacitance at a drain pin when a drain of a synchronous rectifier draws current from the parasitic capacitance, wherein the drain pin is coupled to the drain of the synchronous rectifier via a resistor; and
generate a triggering signal using the first current;

a second current compensation module configured to:
draw a second current from the parasitic capacitance when the drain of the synchronous rectifier provides current into the parasitic capacitance; and
generate an arming signal using the second current; and

a control module configured to activate the synchronous rectifier using the triggering signal and the arming signal.

2. The circuit of claim 1 ,
wherein the first current compensation module comprises:
a first wide bandwidth operational amplifier comprising a non-inverting input coupled to a voltage reference, an inverting input coupled to the drain pin, and an output; and
a first switching element configured to modify, based on a control signal at the output of the first wide bandwidth operational amplifier, a resistance of a channel that electrically connects an input voltage to a first side of a feedback resistor, wherein a second side of the feedback resistor is coupled to the drain pin, wherein the feedback resistor has a resistance value corresponding to the resistor, and wherein the first switching element generates the triggering signal at the first side of the feedback resistor; and

wherein the second current compensation module comprises:
a second wide bandwidth operation amplifier comprising an inverting input coupled to the voltage reference, a non-inverting input coupled to the drain pin, and an output, wherein the second wide bandwidth operation amplifier generates the arming signal at the output of the second wide bandwidth operational amplifier; and
a second switching element configured to modify, based on the arming signal, a resistance of a channel that electrically connects the drain pin to a reference node of the circuit.

3. The circuit of claim 1 , wherein the control module comprises:
an arming module configured to determine, using the arming signal, whether to operate in an armed state when operating in a deactivated state, wherein the control module is configured to deactivate the synchronous rectifier during the deactivated state and wherein the control module is configured to deactivate the synchronous rectifier during the armed state; and
a trigging module configured to:
determine, using the triggering signal, whether to operate in an activated state when operating in the armed state, wherein the control module is configured to activate the synchronous rectifier during the activated state; and
determine, using the triggering signal, whether to operate in the deactivated state when operating in the activated state.

4. The circuit of claim 3 , wherein, to determine whether to operate in the deactivated state, the triggering module is configured to determine, using the triggering signal, whether a negative drain to source voltage at the synchronous rectifier corresponds to zero.

5. The circuit of claim 3 , wherein, to determine whether to operate in the armed state, the arming module is configured to:
generate a voltage indicative of a threshold plateau voltage, the voltage indicative of the threshold plateau voltage being based on a previous plateau voltage of the arming signal; and
compare a current plateau voltage of the arming signal to the threshold plateau voltage.

6. The circuit of claim 5 , wherein, to determine whether to operate in the armed state, the arming module is configured to:
determine a threshold arming delay based on a voltage at an external resistor and the current plateau voltage of the arming signal; and
compare a current arming delay to the threshold arming delay, wherein the arming module is configured to determine to operate in the armed state in response to determining that the current arming delay exceeds the threshold arming delay and in response to determining that the current plateau voltage exceeds the threshold plateau voltage.

7. The circuit of claim 6 , wherein the arming module comprises:
a low pass filter configured to filter the previous plateau voltage using a low-pass filter function to generate a filtered previous plateau voltage;
a super rectifier circuit configured to sample the filtered previous plateau voltage to generate a sampled previous plateau voltage;
a capacitor configured to store the sampled previous plateau voltage;
a voltage divider configured to generate the voltage indicative of the threshold plateau voltage using the sampled previous plateau voltage stored at the capacitor;
a delay module configured to output a set value when the current plateau voltage exceeds the voltage indicative of the threshold plateau voltage and when the current arming delay exceeds the threshold arming delay; and
a flip-flop configured to store the set value from the delay module until a reset value is received, wherein the arming module determines that the current arming delay exceeds the threshold arming delay and that the current plateau voltage exceeds the threshold plateau voltage when the flip-flop is storing the set value.

8. The circuit of claim 1 , wherein the control module further comprises a continuous conduction mode module configured to:
generate a voltage indicative of a threshold activation duration, the voltage indicative of the threshold activation duration being based on a previous activation duration of the synchronous rectifier; and
deactivate the synchronous rectifier when a current activation duration of the synchronous rectifier exceeds the threshold activation duration.

9. The circuit of claim 8 , wherein the continuous conduction mode module comprises:
a current source configured to output a regulated current;
a ramp capacitor configured to receive the regulated current from the current source, wherein a voltage at the ramp capacitor indicates the previous activation duration;
a timer capacitor;
a first pulse generator configured to activate, based on the triggering signal, a first switching element that couples the ramp capacitor to the timer capacitor such that the timer capacitor has a voltage corresponding to a voltage at the ramp capacitor;
a voltage divider configured to receive the voltage at the timer capacitor and to output the voltage indicative of the threshold activation duration;
a second pulse generator configured to activate, based on the triggering signal, after the first pulse generating activates the first switching element, a second switching element that discharges the ramp capacitor, wherein a voltage at the ramp capacitor after discharging the ramp capacitor indicates the current activation duration;
a comparator configured to output a value for deactivating the synchronous rectifier when the voltage at the ramp capacitor exceeds the voltage indicative of the threshold activation duration; and
a third pulse generator configured to deactivate the synchronous rectifier in response to receiving the value for deactivating the synchronous rectifier from the comparator.

10. A method for controlling synchronous rectification, the method comprising:
providing a first current into parasitic capacitance at a drain pin when a drain of a synchronous rectifier draws current from the parasitic capacitance, wherein the drain pin is coupled to the drain of the synchronous rectifier via a resistor;
generating a triggering signal using the first current;
drawing a second

Assignees

• Infineon Technologies Austria Ag

Inventors

• Green Peter
• Ding Hongying
• Quaglino Roberto

Classifications

• H02M3/33592 Primary

  having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title