Load responsive jitter

US9979296B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9979296-B2
Application numberUS-201615240713-A
CountryUS
Kind codeB2
Filing dateAug 18, 2016
Priority dateApr 10, 2015
Publication dateMay 22, 2018
Grant dateMay 22, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A controller for use in a power converter includes a comparator to compare a current sense signal with a current limit to generate a comparator output signal representative of whether a switch current has reached the current limit. A drive circuit controls switching of a power switch to regulate an output of the power converter in response to a feedback signal and the comparator output signal. The drive circuit turns off the power switch in response to the comparator output signal. A current limit generator generates an initial current limit in response to the feedback signal. The current limit is responsive to the initial current limit. A light load sense circuit outputs a light load signal in response to sensing a light load condition of the power converter. A modulation circuit outputs a modulation signal and modulates the initial current limit in response to the light load signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A controller for use in a power converter, comprising: a comparator coupled to compare a current sense signal representing a switch current conducted by a power switch of the power converter with a current limit, wherein the comparator is coupled to generate a comparator output signal representative of whether the switch current has reached the current limit; a drive circuit coupled to generate a drive signal to control switching of the power switch to regulate an output of the power converter in response to a feedback signal representative of an output of the power converter and the comparator output signal, wherein the drive circuit turns off the power switch in response to the comparator output signal; a current limit generator coupled to generate an initial current limit in response to the feedback signal, wherein the current limit is responsive to the initial current limit, wherein the initial current limit is selected from a plurality of current limit values and is coupled to be generated by the current limit generator in response to the feedback signal; a light load sense circuit coupled to output a light load signal in response to sensing a light load condition of the power converter; and a modulation circuit coupled to output a modulation signal and modulate the initial current limit in response to the light load signal. 2. The controller of claim 1 , wherein the current limit is substantially the initial current limit when the light load condition is not sensed, and wherein the current limit is the initial current limit modulated by the modulation signal when the light load condition is sensed. 3. The controller of claim 2 , wherein the light load sense circuit is coupled to determine the light load condition when the initial current limit is substantially equal to a lowest value of the plurality of current limit values. 4. The controller of claim 1 , wherein the modulation signal may be a triangular waveform or a sawtooth waveform. 5. The controller of claim 1 , wherein the modulation circuit further comprises: a counter coupled to receive a clock signal and increment or decrement a count in response to the clock signal, wherein the modulation signal is responsive to the increment or decrement of the count. 6. The controller of claim 1 , wherein the controller further comprises: an arithmetic operator coupled to receive the modulation signal and the initial current limit and output the current limit, wherein the current limit is responsive to an arithmetic operation of the modulation signal and the initial current limit; and a switch coupled to be controlled by the light load signal, wherein the arithmetic operator may receive the modulation signal when the switch is ON. 7. The controller of claim 6 , wherein the arithmetic operator is coupled to perform any number of arithmetic functions including addition, subtraction, multiplication, or division to the modulation signal and the initial current limit signal to output the current limit. 8. The controller of claim 6 , wherein the arithmetic operator is coupled to add the modulation signal and the initial current limit signal to output the current limit. 9. The controller of claim 1 , wherein the modulation signal may be a digital step signal. 10. The controller of claim 9 , wherein the controller further includes an enable circuit coupled to receive the feedback signal and output an enable signal, wherein the enable circuit may determine to turn ON the power switch. 11. The controller of claim 1 , wherein the controller further includes a jitter generator coupled to output a jitter signal, wherein the jitter generator may modulate a switching frequency of the power switch. 12. The controller of claim 11 , wherein the jitter signal may be received by an arithmetic operator or an oscillator coupled to generate a clock signal. 13. The controller of claim 12 , wherein the jitter signal may be received by the enable circuit.

Assignees

Inventors

Classifications

  • with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title

  • H02M3/28Primary

    using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC · CPC title

  • Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

  • Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

  • for the simultaneous control of series or parallel connected semiconductor devices · CPC title

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Frequently asked questions

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What does patent US9979296B2 cover?
A controller for use in a power converter includes a comparator to compare a current sense signal with a current limit to generate a comparator output signal representative of whether a switch current has reached the current limit. A drive circuit controls switching of a power switch to regulate an output of the power converter in response to a feedback signal and the comparator output signal. …
Who is the assignee on this patent?
Power Integrations Inc
What technology area does this patent fall under?
Primary CPC classification H02M3/28. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 22 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).