Display apparatus

Patent metadata

Field	Value
Publication number	US-9978322-B2
Application number	US-201514822735-A
Country	US
Kind code	B2
Filing date	Aug 10, 2015
Priority date	Dec 2, 2014
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

A display apparatus includes gate lines extending in a first direction data lines extending in a second direction crossing the first direction, and pixels connected to the gate lines and the data lines. The pixels displaying first, second, third, and fourth colors are repeatedly arranged in the second direction. A k-th gate line connected to at least one of first pixels displaying the first color among the pixels arranged in an i-th row is electrically connected to a (k+j)th gate line connected to at least one of second pixels displaying the first color among pixels arranged in one row of (i+1)th, (i+2)th, and (i+3)th rows.

First claim

What is claimed is:

1. A display apparatus comprising:
a plurality of gate lines extending in a first direction;
a plurality of data lines extending in a second direction crossing the first direction; and
a plurality of pixels connected to the gate lines and the data lines and arranged in the first and the second directions as a matrix form comprising a plurality of rows and columns, with each row extending in the first direction and each column extending in the second direction, wherein the pixels displaying first, second, third, and fourth colors are repeatedly arranged in the second direction and the pixels in each row are grouped into first pixels including pixels in odd-numbered columns and second pixels including pixels in even-numbered columns, a k-th gate line (k is an integer equal to or greater than 1) is connected to a (k+j)th gate line (j is an integer equal to or greater than 1), wherein the k-th gate line is connected to at least one first pixel displaying the first color and not connected to at least one second pixel in an i-th row (i is an integer equal to or greater than 1), the (k+j)th gate line is connected to at least one second pixel displaying the first color and not connected to at least one first pixel in one row of (i+1)th, (i+2)th, and (i+3)th rows, and the k-th gate line and the (k+j)th gate line are configured to simultaneously provide a same gate signal to simultaneously turn on the at least one of first pixels and the at least one of second pixels during a same horizontal scan period,
wherein the first pixels arranged in a h-th column are connected to the k-th gate line, and the first pixels arranged in a (h+2)th column are connected to a (k+1)th gate line,
and wherein the second pixels are included in the pixels arranged in the (i+2)th row, the second pixels arranged in a (h+3)th column are connected to a (k+4)th gate line, the pixels arranged in the (h+1)th column are connected to a (k+5)th gate line, the k-th gate line is electrically connected to the (k+4)th gate line, and the (k+1)th gate line is electrically connected to the (k+5)th gate line.

2. The display apparatus of claim 1 , wherein the first pixels receive data voltages having different polarities from the second pixels.

3. The display apparatus of claim 1 , wherein the first, second, third, and fourth colors are red, green, blue, and white colors, respectively.

4. The display apparatus of claim 1 , wherein the pixels arranged in a h-th column (h is an integer number equal to or greater than 1) comprise a first logic pixel and a second logic pixel, which are sequentially arranged in the second direction, the pixels arranged in a (h+1)th column comprise a third logic pixel and a fourth logic pixel, which are sequentially arranged in the second direction, and each of the first, second, third, and fourth logic pixels comprises an even number of sub-pixels.

5. The display apparatus of claim 4 , wherein each of the first and fourth logic pixels comprises two pixels of red, green, blue, and white pixels, and each of the second and third logic pixels comprises the other two pixels of the red, green, blue, and white pixels.

6. The display apparatus of claim 5 , wherein the first pixels are included in the pixels arranged in the h-th column and the second pixels are included in the pixels arranged in the (h+1)th column.

7. The display apparatus of claim 1 , wherein the first pixels are included in the pixels arranged in the i-th row, and the second pixels are included in the pixels arranged in the (i+2)th row.

8. The display apparatus of claim 7 , wherein the pixels disposed between a h-th data line and a (h+1)th data line among the data lines are alternately connected to the h-th data line and the (h+1)th data line in the unit of at least one pixel.

9. The display apparatus of claim 8 , wherein a polarity of data voltages applied to the data lines is inverted every one data line.

10. The display apparatus of claim 8 , wherein the k-th gate line and a (k+1)th gate lines are disposed between the pixels arranged in the i-th row and the pixels arranged in the (i+1)th row, and the pixels arranged in the i-th row are alternately connected to the k-th gate line and the (k+1)th gate line in the unit of one pixel.

11. The display apparatus of claim 1 , wherein the pixels arranged between a h-th data line and a (h+1)th data line are commonly connected to one of the h-th data line and the (h+1)th data line.

12. The display apparatus of claim 11 , wherein a polarity of data voltages applied to the data lines is inverted every one data line.

Assignees

• Samsung Display Co Ltd

Inventors

• Namkung Hyunkyu
• Ahn Kuk-Hwan
• Koh Jai-Hyun
• Kim Heendol
• Son Seokyun
• Lee Ik Soo

Classifications

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

• G09G3/3677

  suitable for active matrices only · CPC title

• G09G3/3614 Primary

  Control of polarity reversal in general · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title