Memory device and method with backup energy reservoir to write in-flight data in non-volatile memory

Patent metadata

Field	Value
Publication number	US-9977478-B1
Application number	US-201615391037-A
Country	US
Kind code	B1
Filing date	Dec 27, 2016
Priority date	Dec 27, 2016
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

Provided is a memory device, comprising a non-volatile memory, an energy store coupled to the non-volatile memory, and a power management module configurable to power up the non-volatile memory and provide read access to the non-volatile memory, in response to the energy store being charged to at least a first predetermined level. Provided also is a computational device that includes the memory device. Provided also is a method in which an energy store coupled to a non-volatile memory of a memory device is charged to at least a first predetermined level. The non-volatile memory is powered up and read access is provided to the non-volatile memory, in response to charging the energy store to at least the first predetermined level.

First claim

What is claimed is:

1. A memory device, comprising:
a non-volatile memory;
an energy store coupled to the non-volatile memory; and
a power management module configurable to provide read access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a first predetermined level, and to provide write access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a second predetermined level that is greater than the first predetermined level.

2. The memory device of claim 1 , wherein the energy store is partially charged when the energy store has been charged to the first predetermined level.

3. The memory device of claim 1 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory, in response to a loss of power to the memory device while the energy store has been charged to at least the first predetermined level but not been charged to the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

4. The memory device of claim 1 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory, and write in-flight data to the non-volatile memory, in response to a loss of power to the memory device while the energy store been charged to at least the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

5. The memory device of claim 1 , wherein the energy store is partially or fully charged when the energy store has been charged to the second predetermined level.

6. The memory device of claim 1 , wherein the energy store comprises a capacitor.

7. A method, comprising:
charging an energy store coupled to a non-volatile memory of a memory device to an amount that is at least of a first predetermined level;
providing read access to the non-volatile memory in response to charging the energy store to the amount that is at least of the first predetermined level; and
providing write access to the non-volatile memory in response to charging the energy store to an amount that is at least of a second predetermined level that is greater than the first predetermined level.

8. The method of claim 7 , wherein the energy store is partially charged when the energy store has been charged to the first predetermined level.

9. The method of claim 7 , the method further comprising:
shutting down one or more source power rails of the non-volatile memory, in response to a loss of power to the memory device while the energy store has been charged to at least the first predetermined level but not been charged to the second predetermined level, wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

10. The method of claim 7 , the method further comprising:
shutting down one or more source power rails of the non-volatile memory and writing in-flight data to the non-volatile memory, in response to a loss of power to the memory device while the energy store been charged to at least the second predetermined level, wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

11. The method of claim 7 , wherein the energy store is partially or fully charged when the energy store has been charged to the second predetermined level.

12. The method of claim 7 , wherein the energy store comprises a capacitor.

13. A computational device, comprising:
a processor; and
a memory device coupled to the processor, the memory device comprising:
a non-volatile memory;
an energy store coupled to the non-volatile memory; and
a power management module configurable to provide read access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a first predetermined level, and to provide write access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a second predetermined level that is greater than the first predetermined level.

14. The computational device of claim 13 , wherein the energy store is partially charged when the energy store has been charged to the first predetermined level.

15. The computational device of claim 13 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory, in response to a loss of power to the memory device while the energy store has been charged to at least the first predetermined level but not been charged to the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

16. The computational device of claim 13 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory and write in-flight data to the non-volatile memory, in response to a loss of power to the memory device while the energy store been charged to at least the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

17. The computational device of claim 13 , wherein the energy store is partially or fully charged when the energy store has been charged to the second predetermined level.

18. The computational device of claim 13 , wherein the energy store comprises a capacitor.

19. A computational device, comprising:
a processor;
a display communicatively coupled to the processor;
a network interface communicatively coupled to the processor; and
a memory device coupled to the processor, the memory device comprising:
a non-volatile memory;
an energy store coupled to the non-volatile memory; and
a power management module configurable to provide read access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a first predetermined level, and to provide write access to the non-volatile memory in response to the energy store being charged to an amount that is at least of a second predetermined level that is greater than the first predetermined level.

20. The computational device of claim 19 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory, in response to a loss of power to the memory device while the energy store has been charged to at least the first predetermined level but not been charged to the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

21. The computational device of claim 19 , wherein the power management module is further configurable to shut down one or more source power rails of the non-volatile memory and write in-flight data to the non-volatile memory, in response to a loss of power to the memory device while the energy store been charged to at least the second predetermined level, and wherein if there are two or more source power rails then a shutdown sequence is used to shut down the two or more source power rails.

Assignees

• Intel Corp

Inventors

• Morning-Smith Andrew
• Mocanu Adrian
• Zupanc Zeljko

Classifications

• G06F1/28

  Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

• G11C5/148

  Details of power up or power down circuits, standby circuits or recovery circuits · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/30 Primary

  Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) · CPC title

• G06F1/3275 Primary

  Power saving in memory, e.g. RAM, cache · CPC title