Sensor readout with redundancy-checking

US9977064B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9977064-B2
Application numberUS-201715680912-A
CountryUS
Kind codeB2
Filing dateAug 18, 2017
Priority dateApr 11, 2011
Publication dateMay 22, 2018
Grant dateMay 22, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A difference measurement circuit having a first port and a second port for connection to a first set of nodes and a second set of nodes of a sensor unit. The circuit further has switching units for switching excitation signals emanating from excitation nodes from being applied to the first set of nodes (A, B) via the first port to being applied to the second set of nodes via the second port and for switching differential measurement signals measured at sensing nodes from being obtained from the second set of nodes via the second port to being obtained from the first set of nodes via the first port. The circuit further includes redundancy testing circuitry for evaluating the similarity or deviation between measurement signals obtained in different states of the switching units.

First claim

Opening claim text (preview).

The invention claimed is: 1. A difference measurement circuit for readout of a sensor unit, said sensor unit having a symmetry which allows different configurations of excitation and sensing to lead to a same readout, the difference measurement circuit comprising a first port and a second port for connection to a first set of nodes and a second set of nodes of the sensor unit, the circuit further comprising switching units arranged to switch excitation signals emanating from excitation nodes from being applied to the first set of nodes via the first port to being applied to the second set of nodes via the second port and to switch differential measurement signals measured at sensing nodes from being obtained from the second set of nodes via the second port to being obtained from the first set of nodes via the first port, and redundancy testing circuitry arranged to evaluate similarity or deviation between measurement signals obtained in different states of the switching units raising an error if the measurement signals differ more from one another than a predetermined value. 2. The difference measurement circuit according to claim 1 , wherein the redundancy testing circuitry is arranged to evaluate similarity or deviation of the differential measurement signals measured at the sensing nodes. 3. The difference measurement circuit according to claim 1 , wherein the redundancy testing circuitry is arranged to evaluate similarity or deviation of measurement signals at excitation nodes resulting from a current and/or a voltage applied as an excitation to the sensor unit. 4. The difference measurement circuit according to claim 1 , wherein the redundancy testing circuitry comprises a control unit providing a control signal that controls the switching operation of the switching units and raises an error when the deviations between measurement signals obtained for different values of the control signal are attributable to sensor unit failure. 5. The difference measurement circuit according to claim 1 , wherein said control unit provides said control signal such that the control signal takes on zero-mean random or pseudo-random values. 6. The difference measurement circuit according to claim 1 , comprising excitation circuitry electrically coupled by switching units to the first port or to the second port to enable excitation of the sensor unit, wherein the excitation circuitry comprises a first excitation source electrically connected to the first switching unit and a second excitation source electrically connected to the second switching unit to provide a symmetrical excitation to the sensor unit. 7. The difference measurement circuit according to claim 6 , comprising a measurement circuit that determines a linear combination of voltages at the sensing nodes and/or at the excitation nodes, wherein one of the first or second excitation sources is an independent source, and the other one of the first or second excitation sources is an adaptable source, the excitation circuitry being provided with a feedback circuit that stabilizes the linear combination of the voltages at excitation nodes and/or at sensing nodes to a predetermined value. 8. The difference measurement circuit according to claim 6 , wherein both the first and second excitation sources are independent sources of nominally equal value, the excitation circuitry further comprising at least one adaptable source configured for injecting a nominally equal amount of current to both sensing nodes, the excitation circuitry further being provided with a feedback circuit that controls the at least one adaptable source that stabilizes the linear combination of the voltages at excitation nodes and/or at sensing nodes to a predetermined value.

Assignees

Inventors

Classifications

  • by making use of variations in ohmic resistance, e.g. of potentiometers {, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning} · CPC title

  • of resistance-strain gauges · CPC title

  • involving simple electrical bridges · CPC title

  • Testing of circuits in sensor or actuator systems (testing of apparatus for measuring electric or magnetic variables G01R35/00; testing of indicating or recording apparatus G01D; in airbag systems B60R21/0173; checking gas analysers G01N33/007; monitoring or fail-safe circuits for electromagnets H01F7/1844) · CPC title

  • G01L1/144Primary

    with associated circuitry (G01L1/146 and G01L1/148 take precedence) · CPC title

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What does patent US9977064B2 cover?
A difference measurement circuit having a first port and a second port for connection to a first set of nodes and a second set of nodes of a sensor unit. The circuit further has switching units for switching excitation signals emanating from excitation nodes from being applied to the first set of nodes (A, B) via the first port to being applied to the second set of nodes via the second port and…
Who is the assignee on this patent?
Melexis Tech N V, Melexis Tech Sa
What technology area does this patent fall under?
Primary CPC classification G01L1/144. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 22 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).