Sideband conductor resonance mitigation

US9974161B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9974161-B2
Application numberUS-201615079890-A
CountryUS
Kind codeB2
Filing dateMar 24, 2016
Priority dateJun 25, 2015
Publication dateMay 15, 2018
Grant dateMay 15, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a first pair of conductors to carry differential signals; at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and layout of the conductors is according to a Peripheral Component Interconnect (PCI) Express (PCIe)-based specification; and at least one particular conductor to carry sideband signals, wherein the particular conductor is to be connected to the ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor, wherein the differential signals comprise high speed signals with frequencies higher than frequencies of the sideband signals. 2. The apparatus of claim 1 , wherein the resonance mitigation circuit further comprises a capacitor in series with the resistor. 3. The apparatus of claim 2 , wherein the resonance mitigation circuit further comprises a tee-connection, and the resistor and capacitor are in a first of at least two branches of the tee-connection. 4. The apparatus of claim 1 , wherein the resonance mitigation circuit is to mitigate resonance manifesting in the particular conductor when the particular conductor has at least one floating connection. 5. The apparatus of claim 4 , wherein the floating connection comprises one of an open connection and a connection with a mismatched impedance. 6. The apparatus of claim 1 , wherein the differential signals comprise signals with frequencies greater than 100 MHz. 7. The apparatus of claim 1 , wherein the resonance mitigation circuit is to damp high frequency resonant energy while allowing operation of the sideband signals. 8. The apparatus of claim 1 , wherein the apparatus comprises a connector comprising the first pair of conductors, ground conductor, and particular conductor. 9. The apparatus of claim 8 , wherein the connector comprises card edge contacts of an add-in card. 10. The apparatus of claim 9 , wherein the add-in card comprises an add-in card compliant with a PCIe-based protocol. 11. The apparatus of claim 8 , wherein the connector comprises a card edge connector to accept an add-in card. 12. The apparatus of claim 8 , wherein the connector comprises card edge contacts of a baseboard card. 13. The apparatus of claim 12 , wherein the baseboard card comprises a baseboard card compliant with a PCIe-based protocol. 14. A method comprising: sending a differential signal on a pair of conductors of a connector comprising a plurality of conductors, wherein the differential signal radiates energy to another one of the plurality of conductors and layout of the plurality of conductors of the connector is according to a Peripheral Component Interconnect (PCI) Express (PCIe)-based specification; damping the energy manifesting on the other conductor from the differential signal using a resonance mitigation circuit, wherein the other conductor is coupled to a ground plane via the resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor and a capacitor in series; and sending a sideband signal on the other conductor, wherein the differential signals comprise high speed signals with frequencies higher than frequencies of the sideband signals. 15. A system comprising: a board comprising a card edge connector; an add-in card connected to the card edge connector, wherein the card edge connector comprises: a first pair of conductors to carry differential signals; at least one ground conductor approximate to the first pair of conductors, the ground conductor to be connected to a ground plane; and at least one particular conductor to carry sideband signals, wherein the particular conductor is to be connected to the ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor in series with a capacitor, wherein the differential signals comprise high speed signals with frequencies higher than frequencies of the sideband signals. 16. The system of claim 15 , wherein the add-in card comprises: a pair of conductors to correspond to the first pair of conductors and carry the differential signals; a ground conductor to correspond to the ground conductor of the card edge connector; and a sideband conductor to correspond to the particular conductor. 17. The system of claim 16 , wherein the sideband conductor is to be connected to a ground plane via a respective resonance mitigation circuit, and the respective resonance mitigation circuit comprises a resistor in series with a capacitor. 18. The system of claim 16 , wherein the sideband conductor is unterminated at the add-in card. 19. The system of claim 15 , wherein the resonance mitigation circuit consists of the resistor connected in series to the capacitor.

Assignees

Inventors

Classifications

  • at high-frequency [HF] or radio frequency [RF] · CPC title

  • Filters, inductors or a magnetic substance · CPC title

  • H05K1/0219Primary

    Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors · CPC title

  • Lay-out of balanced signal pairs, e.g. differential lines or twisted lines · CPC title

  • Pads along the edge of rigid circuit boards, e.g. for pluggable connectors · CPC title

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Frequently asked questions

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What does patent US9974161B2 cover?
An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonan…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H05K1/0219. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).