Low delay picture coding
US-2015023409-A1 · Jan 22, 2015 · US
US9973748B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9973748-B1 |
| Application number | US-201414259144-A |
| Country | US |
| Kind code | B1 |
| Filing date | Apr 22, 2014 |
| Priority date | Apr 26, 2013 |
| Publication date | May 15, 2018 |
| Grant date | May 15, 2018 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A multi-core video decoder system has a syntax parser, a storage device, a plurality of video decoder cores and a control unit. The syntax parser performs syntax parsing upon an incoming encoded video bitstream to derive required information of each picture to be decoded. The storage device buffers the required information of each picture. The control unit controls the video decoder cores to load required information of a plurality of coding rows in a picture from the storage device and then decode the coding rows in the picture, respectively.
Opening claim text (preview).
What is claimed is: 1. A multi-core video decoder system, comprising: a syntax parser, arranged to perform syntax parsing upon an incoming encoded video bitstream to derive required information of each picture to be decoded; a storage device, arranged to buffer the required information of each picture; and a plurality of video decoder cores, each having a decoder arranged to perform syntax parsing, wherein the syntax parser and the decoder are separate circuits; wherein the video decoder cores load required information of a plurality of coding rows in a picture from the storage device and then decode the coding rows in the picture, respectively; wherein the coding rows comprise a first coding row and a second coding row that are vertically adjacent to each other in the picture; decoding of the second coding row requires information given from a decoding result of the first coding row; and before decoding of the first coding row is completed by a first video decoder core of the video decoder cores, a second video decoder core of the video decoder cores starts decoding the second coding row according to required information of the second coding row that is generated by the syntax parser; wherein before the decoder of one of the video decoder cores performs syntax parsing upon the first coding row, the syntax parser performs syntax parsing upon the first coding row to obtain pre-parsed syntax information as the required information of the second coding row; wherein the syntax parser is not a part of the decoder in each of the video decoder cores, and the syntax parser and the decoder in said each of the video decoder cores are all equipped with syntax parsing capability. 2. The multi-core video decoder system of claim 1 , wherein each coding row comprises at least one macroblock (MB) row or at least one coding tree unit (CTU) row. 3. The multi-core video decoder system of claim 1 , wherein regarding each coding row, the syntax parser only stores a status at a designated start point of a decoding operation of the coding row that one of the video decoder cores uses to start decoding the coding row into the storage device to serve as required information of the coding row. 4. The multi-core video decoder system of claim 3 , wherein the designated start point is at a beginning of the coding row. 5. The multi-core video decoder system of claim 1 , wherein a processing time of at least one of the video decoder cores decoding at least one of the coding rows is overlapped with a processing time of at least another one of the video decoder cores decoding at least another one of the coding rows. 6. The multi-core video decoder system of claim 1 , wherein the second video decoder core of the video decoder cores does not start decoding the second coding row below the first coding row until the first video decoder core of the video decoder cores finishes decoding an M th encoded data unit in the first coding row; and M is a positive integer. 7. The multi-core video decoder system of claim 1 , wherein pictures to be decoded are processed by the syntax parser and the video decoder cores through a picture based pipeline; and the video decoder cores start decoding the coding rows in the picture after the syntax parser finishes performing syntax parsing upon an integer number of pictures including the picture. 8. The multi-core video decoder system of claim 1 , wherein coding rows to be decoded are processed by the syntax parser and the video decoder cores through a coding row based pipeline; and the video decoder cores start decoding the coding rows in the picture after the syntax parser finishes performing syntax parsing upon a portion of the picture that includes at least one of the coding rows. 9. The multi-core video decoder system of claim 1 , wherein the syntax parser is further arranged to perform error detection, generate an error table of the picture based on at least an error detection result, and store the error table into the storage device; the error table records error information indicative of each erroneous encoded data unit in the picture; and the video decoder cores are further arranged to perform error handling according to the error information obtained from the error table. 10. The multi-core video decoder system of claim 1 , wherein the picture is partitioned into a plurality of tiles each composed of coding rows, the coding rows in each tile are decoded by the video decoder cores in a vertical scan order, and the tiles in the picture are decoded by the video decoder cores in a raster scan order. 11. The multi-core video decoder system of claim 1 , wherein the picture is partitioned into a plurality of tiles each composed of coding rows, the coding rows in each tile column are decoded by the video decoder cores in a vertical scan order, and the tile columns in the picture are decoded by the video decoder cores in a horizontal scan order. 12. The multi-core video decoder system of claim 1 , wherein the picture is partitioned into a plurality of tiles each composed of coding rows, and all coding rows in the picture are decoded by the video decoder cores in a raster scan order. 13. A multi-core video decoding method, comprising: performing syntax parsing upon an incoming encoded video bitstream to derive required information of each picture to be decoded; storing the required information of each picture into a storage device; and utilizing a plurality of video decoder cores to load required information of a plurality of coding rows in a picture from the storage device and then decode the coding rows in the picture, respectively, wherein each of the video decoder cores has a decoder arranged to perform syntax parsing, and the step of performing syntax parsing upon the incoming encoded video bitstream to derive required information of each picture to be decoded is not executed by the decoder in said each of the video decoder cores; wherein the coding rows comprise a first coding row and a second coding row that are vertically adjacent to each other in the picture; decoding of the second coding row requires information given from a decoding result of the first coding row; and before decoding of the first coding row is completed by a first video decoder core of the video decoder cores, a second video decoder core of the video decoder cores starts decoding the second coding row according to required information of the second coding row that is generated by the syntax parsing; wherein before the decoder of one of the video decoder cores performs syntax parsing upon the first coding row, the step of performing syntax parsing upon the incoming encoded video bitstream to derive required information of each picture to be decoded performs syntax parsing upon the first coding row to obtain pre-parsed syntax information as the required information of the second coding row. 14. The multi-core video decoding method of claim 13 , wherein each coding row comprises at least one macroblock (MB) row or at least one coding tree unit (CTU) row. 15. The multi-core video decoding method of claim 13 , wherein the step of storing the required information of each picture into the storage device comprises: regarding each coding row, only storing a status at a designated start point of a decoding operation of the coding row that one of the video decoder cores uses to start decoding the coding row into the storage device to serve as required information of the coding row. 16. The multi-core video decoding method of claim 15 , wherein the designated start point is at a beginning of the codin
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.