Photovoltaic apparatus
US-2015075581-A1 · Mar 19, 2015 · US
Monolithic interconnection for solar cells
US9972733B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9972733-B2 |
| Application number | US-201615226268-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 2, 2016 |
| Priority date | Aug 2, 2016 |
| Publication date | May 15, 2018 |
| Grant date | May 15, 2018 |
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- Title
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- Abstract
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- First independent claim
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Abstract
Official abstract text for this publication.
A method for fabricating a solar cell includes providing a first substrate with at least one protruding element on the first substrate. The method removes a portion of a lower conducting layer located on the first substrate, wherein the removed portion of the lower conducting layer is located near the at least one protruding element. The method removes a first portion of an active layer located on the lower conducting layer. The method deposits an upper conducting layer on the active layer, wherein the conducting layer covers the at least one protruding element. The method removes a portion of the upper conducting layer, wherein the removed portion of the upper conducting is located near the at least one protruding element.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a solar cell, the method comprising: providing a first substrate with at least one element on the first substrate, wherein the at least one element protrudes 1 to 5 micrometers on a top surface of the first substrate; depositing a lower conducting layer on the first substrate; removing a portion of the lower conducting layer located on the first substrate, wherein the removed portion of the lower conducting layer is located along a first side of the at least one element; depositing an active layer on the lower conducting layer; removing a portion of the active layer located on the lower conducting layer; depositing an upper conducting layer on the active layer, wherein the upper conducting layer covers the at least one element; and removing a portion of the upper conducting layer, wherein the removed portion of the upper conducting layer includes a first removed portion that partially surrounds the at least one element, a second removed portion that connects to a first end of the first removed portion, a third removed portion that connects to a second end of the first removed portion, wherein the second removed portion and the third removed portion each align with the removed portion of the lower conducting layer. 2. The method of claim 1 , wherein removing a portion of the lower conducting layer located on the first substrate, comprises: scribing the portion of the lower conducting layer, wherein scribing the portion of the lower conducting layer exposes the substrate. 3. The method of claim 1 , further comprising: subsequent to depositing the active layer on the lower conducting layer, depositing a buffer layer on the active layer. 4. The method of claim 3 , wherein removing a portion of the active layer located on the lower conducting layer, comprises: scribing the first portion of the buffer layer and the active layer, wherein scribing the first portion of the active layer exposes the lower conducting layer. 5. The method of claim 1 , wherein removing a portion of the upper conducting layer, comprises: scribing the portion of the upper conducting layer, wherein scribing the portion of the upper conducting layer exposes the active layer. 6. The method of claim 1 , wherein the active layer is photovoltaic.
Assignees
Inventors
Classifications
- H01L31/0465Primary
Electricity · mapped topic
Electricity · mapped topic
the films including Group II-VI materials, e.g. CdTe or CdS · CPC title
the films including Group I-III-VI materials, e.g. CIS or CIGS · CPC title
The active layers comprising only Group II-VI materials, e.g. CdS, ZnS or CdTe · CPC title
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Frequently asked questions
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- What does patent US9972733B2 cover?
- A method for fabricating a solar cell includes providing a first substrate with at least one protruding element on the first substrate. The method removes a portion of a lower conducting layer located on the first substrate, wherein the removed portion of the lower conducting layer is located near the at least one protruding element. The method removes a first portion of an active layer located…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H01L31/0465. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).