Display device

US9972693B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9972693-B2
Application numberUS-201615080381-A
CountryUS
Kind codeB2
Filing dateMar 24, 2016
Priority dateJun 12, 2015
Publication dateMay 15, 2018
Grant dateMay 15, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device is disclosed. In one aspect, the device includes a substrate and a display unit disposed on the substrate and including a plurality of pixels each pixel including a thin film transistor, a display element electrically connected to the thin film transistor, and a planarization layer interposed between the thin film transistor and the display element. The display unit includes a display region and a non-display region surrounding the display region, wherein the non-display region includes a voltage line. The planarization layer comprises a central portion, an outer portion and a dividing region interposed between the central and outer portions, wherein the dividing region is located in the non-display region. The planarization layer covers at least a lateral side of the voltage line formed in the dividing region.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device, comprising: a substrate; and a display unit disposed on the substrate and including a plurality of pixels each pixel comprising a thin film transistor, a display element electrically connected to the thin film transistor, and a planarization layer interposed between the thin film transistor and the display element, wherein the display unit comprises a display region and a non-display region surrounding the display region, wherein the non-display region includes a voltage line, wherein the planarization layer comprises a central portion, an outer portion and a dividing region interposed between the central and outer portions, wherein the dividing region is located in the non-display region, wherein the planarization layer covers at least a lateral side of the voltage line formed in the dividing region, and wherein the voltage line comprises i) a first voltage line disposed at a position corresponding to a side of the display region and ii) a pair of first connectors protruding from the first voltage line in a first direction, the first connectors comprising: a first region extending from the first voltage line in the first direction; and a second region continuously extending from the first region in the first direction, wherein the second region is shifted from the first region in a second direction crossing the first direction, wherein lateral sides of the first connectors are covered by a pair of first covering portions extending from the central portion and a pair of second covering portions extending from the outer portion, and wherein the first and second covering portions are separated apart from each other. 2. The display device of claim 1 , wherein the first covering portions extend from the central portion in the first direction and cover lateral sides of the first regions, and wherein the second covering portions extend from the outer portion in a third direction opposite the first direction and cover lateral sides of the second regions. 3. The display device of claim 1 , wherein the voltage line further comprises a second voltage line covering a pair of first end portions of the first voltage line and a remaining region of the display region other than the side of the display region, and wherein the central portion contacts and overlaps an inner edge portion of the second voltage line in the depth dimension of the display device. 4. The display device of claim 3 , wherein the second voltage line comprises: a pair of bent portions covering the first end portions; and a pair of second connectors respectively protruding from the bent portions in the first direction, wherein the second covering portions cover lateral sides of the second connectors. 5. The display device of claim 4 , wherein the second connectors are respectively spaced apart from end portions of the bent portions, and wherein the first covering portions cover lateral sides formed on the end portions of the bent portions. 6. The display device of claim 3 , further comprising a dam contacting and overlapping outer edge portions of the second voltage line in the depth dimension of the display device, wherein the dam is located in the dividing region and spaced apart from the central portion. 7. The display device of claim 6 , wherein the dam is formed on the same layer as the planarization layer and formed of the same material as that of the planarization layer. 8. The display device of claim 6 , further comprising a thin film encapsulating layer sealing the display unit, wherein the thin film encapsulating layer comprises at least one organic layer and at least one inorganic layer, and wherein the at least one organic layer is located inside the dam. 9. The display device of claim 8 , wherein the at least one inorganic layer extends to a region outside the outer portion. 10. The display device of claim 9 , wherein the thin film transistor comprises an active layer, a gate electrode, a source electrode, and a drain electrode, and wherein each of the source electrode, the drain electrode, and the voltage line has a triple-layer structure formed of titanium, aluminum, and titanium. 11. The display device of claim 1 , further comprising: a gate insulating layer interposed between the active layer and the gate electrode; and an interlayer insulating layer interposed between the gate and source electrodes and between the gate and drain electrodes, wherein the gate insulating layer and the interlayer insulating layer extend into the non-display region, and wherein the at least one inorganic layer contacts the gate insulating layer or the interlayer insulating layer in the region outside the outer portion. 12. The display device of claim 11 , wherein the at least one inorganic layer is formed over an end portion of the gate insulating layer or the interlayer insulating layer and contacts an upper surface of the substrate. 13. The display device of claim 1 , wherein the display element includes an organic light-emitting diode comprising a first electrode electrically connected to the thin film transistor, a second electrode opposite the first electrode, and an intermediate layer interposed between the first and second electrodes.

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What does patent US9972693B2 cover?
A display device is disclosed. In one aspect, the device includes a substrate and a display unit disposed on the substrate and including a plurality of pixels each pixel including a thin film transistor, a display element electrically connected to the thin film transistor, and a planarization layer interposed between the thin film transistor and the display element. The display unit includes a …
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L29/45. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).