Laminated ceramic electronic component

Patent metadata

Field	Value
Publication number	US-9972438-B2
Application number	US-201615172199-A
Country	US
Kind code	B2
Filing date	Jun 3, 2016
Priority date	Dec 6, 2010
Publication date	May 15, 2018
Grant date	May 15, 2018

Abstract

A method for manufacturing a laminated ceramic capacitor having a laminated body including a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The laminated body has a pair of mutually opposed principal surfaces extending in the direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces which respectively extend in directions orthogonal to the principal surfaces. The internal electrodes are 0.4 μm or less in thickness, and are located in an area defined by a width-direction gap of 30 μm or less interposed with respect to each of the pair of side surfaces and an outer layer thickness of 35 μm or less interposed with respect to each of the pair of principal surfaces.

First claim

The invention claimed is:

1. A method for manufacturing a laminated ceramic electronic component, the method comprising:
providing a first plurality of ceramic green sheets;
printing conductive paste films on the first plurality of ceramic green sheets in a thickness that results in internal electrodes of 0.4 μm or less in thickness after firing;
providing a second plurality of ceramic green sheets without conductive paste films thereon;
stacking the first plurality of green sheets with the conductive paste films thereon and the second plurality of ceramic green sheets to form an unsintered body; and
firing the unsintered body at a temperature greater than 1000° C. to form a laminated body that includes a plurality of stacked ceramic layers and a plurality of internal electrodes located between the ceramic layers, a pair of mutually opposed principal surfaces extending in a direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces, the side surfaces and the end surfaces respectively extending in directions orthogonal to the principal surfaces, the plurality of internal electrodes including a first set of internal electrodes that extend to a first end surface of the pair of end surfaces and a second set of internal electrodes that extend to a second end surface of the pair of end surfaces, the plurality of internal electrodes being distributed in an area defined by a width-direction gap interposed with respect to each of the pair of side surfaces and an outer layer thickness interposed with respect to each of the pair of principal surfaces, the coverage of the internal electrodes is 75% or more, and at least one of (1) the width-direction gap is 30 μm or less and (2) the outer layer thickness is 35 μm or less.

2. The method for manufacturing a laminated ceramic electronic component according to claim 1 , wherein both the width-direction gap is 30 μm or less and the outer layer thickness is 35 μm or less.

3. The method for manufacturing a laminated ceramic electronic component according to claim 1 , wherein the plurality of internal electrodes are no less than 0.05 μm in thickness after firing.

4. The method for manufacturing a laminated ceramic electronic component according to claim 3 , wherein the width-direction gap is no less than 5 μm.

5. The method for manufacturing a laminated ceramic electronic component according to claim 4 , wherein the outer layer thickness is no less than 5 μm.

6. The method for manufacturing a laminated ceramic electronic component according to claim 1 , wherein the width-direction gap is no less than 5 μm.

7. The method for manufacturing a laminated ceramic electronic component according to claim 1 , wherein the outer layer thickness is no less than 5 μm.

8. The method for manufacturing a laminated ceramic electronic component according to claim 2 , wherein the plurality of internal electrodes are no less than 0.05 μm in thickness after firing.

9. The method for manufacturing a laminated ceramic electronic component according to claim 8 , wherein the width-direction gap is no less than 5 μm.

10. The method for manufacturing a laminated ceramic electronic component according to claim 9 , wherein the outer layer thickness is no less than 5 μm.

11. The method for manufacturing a laminated ceramic electronic component according to claim 2 , wherein the width-direction gap is no less than 5 μm.

12. The method for manufacturing a laminated ceramic electronic component according to claim 2 , wherein the outer layer thickness is no less than 5 μm.

13. The method for manufacturing a laminated ceramic electronic component according to claim 1 , wherein the conductive paste contains Ni.

Assignees

• Murata Manufacturing Co

Inventors

• Saito Yoshito
• Hirata Yosuke
• Hiramatsu Takashi

Classifications

• H05K3/4664

  Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders (H05K3/4647 takes precedence) · CPC title

• H01G4/12 Primary

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H05K3/4629

  laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets · CPC title

• H01G4/258 Primary

  Temperature compensation means · CPC title

• H01G4/1209 Primary

  characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title