Display apparatus, method of driving display panel using the same and driver for the display apparatus

US9972265B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9972265-B2
Application numberUS-201514674674-A
CountryUS
Kind codeB2
Filing dateMar 31, 2015
Priority dateOct 16, 2014
Publication dateMay 15, 2018
Grant dateMay 15, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes a display panel and a timing controller. The display panel includes a first display area on which a first gate line group is disposed and a second display area on which a second gate line group is disposed. The second gate line group is disconnected from the first gate line group. The timing controller is configured to determine a first driving frequency of the first display area based on first image data displayed on the first display area and a second driving frequency of the second display area based on second image data displayed on the second display area.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: a display panel comprising a first display area on which a first gate line group is disposed and a second display area on which a second gate line group is disposed, the second gate line group being disconnected from the first gate line group; a timing controller configured to determine a first driving frequency of the first display area based on first image data displayed on the first display area and a second driving frequency of the second display area based on second image data displayed on the second display area; a first gate driver configured to control the first gate line group; and a second gate driver configured to control the second gate line group, wherein the first gate line group is spaced apart from the second gate line group in a first direction, wherein each gate line of the first gate line group are spaced apart from one another in a second direction, wherein each gate line of the second gate line group are spaced apart from one another in the second direction, and wherein the first direction is different from the second direction, wherein the second gate driver outputs first gate signals to all gate lines of the second gate line group during a first period and outputs the first gate signals only to the gate lines of the second gate line group corresponding to a first video image during a second period different from the first period, when the second image data includes both the first video image and a first static image. 2. The display apparatus of claim 1 , wherein the first display area and the second display area are adjacent to each other in a horizontal direction. 3. The display apparatus of claim 1 , wherein a size of the first display area is the same as a size of the second display area. 4. The display apparatus of claim 1 , wherein the first gate driver is configured to apply a second gate signal to the first gate line group. 5. The display apparatus of claim 4 , wherein when the first image data includes a second video image, the timing controller determines the first driving frequency as a high driving frequency, when the first image data only includes a second static image, the timing controller determines the first driving frequency as a low driving frequency, when the second image data includes the first video image, the timing controller determines the second driving frequency as a high driving frequency, and when the second image data only includes the first static image, the timing controller determines the second driving frequency as a low driving frequency. 6. The display apparatus of claim 5 , wherein when the second image data includes both the first video image and the first static image, the second gate driver outputs the first gate signals to the gate lines of the second gate line group from a vertical start point of the first video image. 7. The display apparatus of claim 6 , wherein the second gate driver comprises a demultiplexer, and the demultiplexer is configured to receive an input vertical start signal, receive N selecting signals and to select an output vertical start signal from 2 N output vertical start signals, the selected output vertical start signal representing the vertical start point of the first video image, where N is an integer greater than 1. 8. The display apparatus of claim 5 , further comprising a data driver configured to output data voltages to the first display area and the second display area, wherein when the first image data only includes the second static image, a buffer of the data driver that performs a buffering based on the first image data is turned off during a blank period. 9. The display apparatus of claim 5 , further comprising a data driver configured to output data voltages to the first display area and the second display area, wherein when the first image data only includes the second static image, a power voltage is not provided during a blank period to a portion of the data driver that processes the first image data. 10. The display apparatus of claim 1 , wherein when the second image data includes both the first video image and the first static image, the timing controller generates a gate masking signal which blocks gate clock pulses outputted to the gate lines of the second gate line group corresponding to the first static image during the second period. 11. The display apparatus of claim 1 , wherein the first direction is perpendicular to the second direction. 12. The display apparatus of claim 1 , wherein the second gate driver outputs the first gate signals to all the gate lines of the second gate line group during a third period when the second input image data includes both the first video image and the first static image, wherein the first period and the third period have a duration of a single frame period, wherein the second period has a duration of two frame periods, and the second period is between the first and third periods. 13. A method of driving a display panel, the method comprising: determining a first driving frequency based on first input image data, wherein the first input image data is displayed on a first display area on which a first gate line group is located; determining a second driving frequency based on second input image data, wherein the second input image data is displayed on a second display area on which a second gate line group is located; and driving the first display area with the first driving frequency and the second display area with the second driving frequency, wherein the first gate line group is spaced apart from the second gate line group in a first direction, wherein each gate line of the first gate line group are spaced apart from one another in a second direction, wherein each gate line of the second gate line group are spaced apart from one another in the second direction, wherein the first direction is different from the second direction, and wherein the driving comprises outputting first gate signals to all gate lines of the second gate line group during a first period and outputting the first gate signals only to the gate lines of the second gate line group corresponding to a first video image during a second period different from the first period, when the second input image data includes both the first video image and a first static image. 14. The method of claim 13 , wherein when the first input image data includes a second video image, the first driving frequency is determined as a high driving frequency, when the first input image data only includes a second static image, the first driving frequency is determined as a low driving frequency, when the second input image data includes the first video image, the second driving frequency is determined as a high driving frequency, and when the second input image data only includes the first static image, the second driving frequency is determined as a low driving frequency. 15. The method of claim 14 , wherein when the second input data includes both the video image and the first static image, the first gate signals are outputted to the gate lines of the second gate line up from a vertical start point of the first video image. 16. The method of claim 15 , wherein when the second input data includes both the first video image and the first static image, an output vertical start signal is selected from 2 N output vertical start signals based on an input vertical start signal and N selecting signals, and the first gate signals are outputted to the gate lines of the second gate line group from a gate line directed by the selected output vertical s

Assignees

Inventors

Classifications

  • G09G3/3666Primary

    with the matrix divided into sections · CPC title

  • Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns · CPC title

  • Partial updating of the display screen · CPC title

  • Special adaptations of display systems for operation with variable images · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

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What does patent US9972265B2 cover?
A display apparatus includes a display panel and a timing controller. The display panel includes a first display area on which a first gate line group is disposed and a second display area on which a second gate line group is disposed. The second gate line group is disconnected from the first gate line group. The timing controller is configured to determine a first driving frequency of the firs…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3666. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).