Isolator system with status data integrated with measurement data

US9972196B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9972196-B2
Application numberUS-201213670364-A
CountryUS
Kind codeB2
Filing dateNov 6, 2012
Priority dateApr 23, 2012
Publication dateMay 15, 2018
Grant dateMay 15, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An isolator system is disclosed in which a pair of circuit systems is separated by an isolation barrier but engage in mutual communication by an isolator device that bridges the isolation barrier. A first circuit system may include a measurement system generating measurement data and status monitor generating status data. The first circuit system also may include a communication system that multiplexes the measurement data and the status data for transmission across a common isolator device. In this manner, the number of isolator devices may be reduced over conventional designs.

First claim

Opening claim text (preview).

I claim: 1. An isolator system with data multiplexing, comprising: a pair of circuit systems including a first circuit system and a second circuit system separated by an electrical isolation barrier and communicatively coupled to each other by at least one isolator device that bridges the isolation barrier, the first circuit system of the pair comprising: a measurement system generating measurement data, a status monitor generating status data of a type different than the measurement data, and a communication system that multiplexes the measurement data and the status data in the first circuit system for transmission to the second circuit system of the pair of circuit systems across a common isolator device synchronous with a clock edge received by the first circuit system from the second circuit system of the pair of circuit systems. 2. The system of claim 1 , wherein the status data represents a state of an operational voltage in the first circuit system. 3. The system of claim 1 , wherein the status data indicates whether an error condition exists in the first circuit system. 4. The system of claim 1 , wherein the clock edge is an edge of a master clock signal generated by the second circuit system. 5. The system of claim 4 , wherein measurement operations of the first circuit system are synchronized to the master clock signal. 6. The system of claim 4 , wherein the multiplexed measurement data and the status data are transmitted across the common isolator device within a single clock cycle. 7. The system of claim 4 , wherein the multiplexed measurement data and the status data are provided to the isolator device as a series of pulses provided once per master clock cycle. 8. The system of claim 4 , wherein the multiplexed measurement data and the status data are provided to the isolator device as a series of pulses provided twice per master clock cycle. 9. The system of claim 4 , further comprising: a power isolator bridging the isolation barrier, a power transmitter provided on the second circuit system, and a power receiver provided in the first circuit system, wherein the status data includes data representing a state of a voltage generated by the power receiver, and the second circuit system modulates operation of the power transmitter in response thereto. 10. The system of claim 9 , further comprising a power controller provided in the second circuit system that accumulates the status data from the first circuit system. 11. The system of claim 10 , wherein the power controller provides power at a minimum level notwithstanding an excess number of status data transmissions indicating a need for lower power. 12. The system of claim 10 , wherein the power controller provides power at a maximum level notwithstanding an excess number of status data transmissions indicating a need to increase power. 13. A system, comprising: a pair of circuit systems separated by an electrical isolation barrier; a first circuit system of the pair comprising: a power receiver, a measurement system generating measurement data, a supply monitor generating status data, of a type different than the measurement data, representing state of an electrical supply in the first circuit system, and a communication system that multiplexes the measurement data and the status data for transmission across the isolation barrier by a common first isolator device, synchronous with a clock edge received from a second circuit system of the pair of circuit systems; and the second circuit system comprising: a power transmitter coupled to the power receiver via a second isolator device; and a power controller responsive to the status data that regulates output of the power transmitter. 14. The system of claim 13 , wherein the power controller provides power at a minimum level notwithstanding an excess number of status data transmissions indicating a need for lower power. 15. The system of claim 13 , wherein the power controller provides power at a maximum level notwithstanding an excess number of status data transmissions indicating a need to increase power. 16. The system of claim 13 , wherein the clock edge is an edge of a master clock signal for use by the first circuit system. 17. The system of claim 16 , wherein the multiplexed measurement data and the status data are transmitted across the common first isolator device within a single clock cycle. 18. The system of claim 16 , wherein transmissions of the first circuit system are synchronized to the master clock signal. 19. The system of claim 18 , wherein the transmissions are provided to the common first isolator device as a series of pulses provided once per master clock cycle. 20. The system of claim 18 , wherein the transmissions are provided to the common first isolator device as a series of pulses provided twice per master clock cycle. 21. A method, comprising: generating measurement data and status data by a first circuit system on a first side of an isolation barrier, the measurement data representing a result of a test performed on an input signal, and the status data representing an operational state of the first circuit system, multiplexing the measurement data and the status data on the first side of the isolation barrier, and transmitting, to a second circuit system on a second side of the isolation barrier, the multiplexed measurement data and the status data across the isolation barrier on a common isolator device synchronous with a clock edge received from the second side of the isolation barrier. 22. The method of claim 21 , wherein the transmitting includes transmitting the measurement data and status data within a single clock cycle. 23. The method of claim 21 , wherein the transmitting includes transmitting the measurement data and status data in a pulse sequence once per clock cycle. 24. The method of claim 21 , wherein the transmitting includes transmitting the measurement data and status data in a pulse sequence twice per clock cycle. 25. The method of claim 21 , wherein the status data represents states of an operational voltage in the first circuit system on the first side. 26. The method of claim 21 , wherein the status data indicates whether an error condition exists in the first circuit system on the first side. 27. A system, comprising: an isolator device that bridges an isolation barrier, a first circuit system comprising: a measurement system generating measurement data, a status monitor generating status data of a type different than the measurement data, and a communication system that multiplexes the measurement data and the status data for transmission across a common isolator device to a second circuit system synchronous with a clock edge received by the first circuit system. 28. The system of claim 27 , wherein the status data represents state of an operational voltage in the first circuit system. 29. The system of claim 27 , wherein the status data indicates whether an error condition exists in the first circuit system. 30. The system of claim 27 , wherein the communication system receives signals representing timing of a master clock signal from across the isolation barrier and the first circuit system generates a local timing reference therefrom, wherein the clock edge is an edge of the local timing reference.

Assignees

Inventors

Classifications

  • using capacity coupling · CPC title

  • Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling · CPC title

  • H04Q9/00Primary

    Arrangements in telecontrol or telemetry systems for selectively calling a substation from a main station, in which substation desired apparatus is selected for applying a control signal thereto or for obtaining measured values therefrom · CPC title

  • successively, i.e. using time division · CPC title

  • where the sensing device enters an active or inactive mode · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9972196B2 cover?
An isolator system is disclosed in which a pair of circuit systems is separated by an isolation barrier but engage in mutual communication by an isolator device that bridges the isolation barrier. A first circuit system may include a measurement system generating measurement data and status monitor generating status data. The first circuit system also may include a communication system that mul…
Who is the assignee on this patent?
Analog Devices Inc
What technology area does this patent fall under?
Primary CPC classification H04Q9/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).