Accurate hotspot detection through temperature sensors

US9971368B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9971368-B2
Application numberUS-201514963790-A
CountryUS
Kind codeB2
Filing dateDec 9, 2015
Priority dateDec 9, 2015
Publication dateMay 15, 2018
Grant dateMay 15, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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In one embodiment, a temperature management system comprises a plurality of temperature sensors on a chip, and a temperature manager. The temperature manager is configured to receive a plurality of temperature readings from the temperature sensors, to determine a plurality of power values based on the temperature readings, to determine a plurality of temperature values based on the determined power values, the determined temperature values corresponding to a plurality of different locations on the chip, and to estimate a temperature of a hotspot on the chip based on the determined temperature values.

First claim

Opening claim text (preview).

What is claimed is: 1. A temperature management system, comprising: a plurality of temperature sensors on a chip; and a temperature manager configured to receive a plurality of temperature readings from the temperature sensors, to determine a plurality of power values based on the temperature readings, to determine a plurality of temperature values based on the determined power values, the determined temperature values corresponding to a plurality of different locations on the chip, and to estimate a temperature of a hotspot on the chip based on the determined temperature values; wherein the temperature manager is configured to determine the power values using influence coefficients relating the power values to temperature changes at the temperature sensors. 2. The system of claim 1 , wherein the temperature manager is configured to estimate the temperature of the hotspot based on a largest one of the determined temperature values. 3. The system of claim 2 , wherein the temperature manager is configured to estimate a location of the hotspot based on the location corresponding to the largest one of the determined temperature values. 4. The system of claim 1 , wherein each of the power values corresponds to power at a respective one of a plurality of blocks on the chip. 5. The system of claim 4 , wherein the blocks include one or more processors. 6. The system of claim 1 , wherein the temperature manager is configured to determine the temperature values using influence coefficients relating the power values to temperature changes at the different locations on the chip. 7. The system of claim 1 , wherein the temperature manager is configured to compare the estimated temperature of the hotspot to a temperature threshold, and to initiate temperature mitigation if the estimated temperature of the hotspot exceeds the temperature threshold. 8. The system of claim 7 , wherein the temperature manager is configured to initiate temperature mitigation by commanding a clock source to reduce a frequency of a clock signal, commanding a power source to reduce a supply voltage, or both. 9. A method for managing temperature, comprising: receiving temperature readings from a plurality of temperature sensors on a chip; determining a plurality of power values based on the temperature readings; determining a plurality of temperature values based on the determined power values, the determined temperature values corresponding to a plurality of different locations on the chip; and estimating a temperature of a hotspot on the chip based on the determined temperature values; wherein determining the power values comprises determining the power values using influence coefficients relating the power values to temperature changes at the temperature sensors. 10. The method of claim 9 , wherein estimating the temperature of the hotspot comprises determining a largest one of the determined temperature values. 11. The method of claim 10 , further comprising estimating a location of the hotspot based on the location corresponding to the largest one of the determined temperature values. 12. The method of claim 9 , wherein each of the power values corresponds to power at a respective one of a plurality of blocks on the chip. 13. The method of claim 12 , wherein the blocks include one or more processors. 14. The method of claim 9 , wherein determining the temperature values comprises determining the temperature values using influence coefficients relating the power values to temperature changes at the different locations on the chip. 15. The method of claim 9 , further comprising: comparing the estimated temperature of the hotspot to a temperature threshold; initiating temperature mitigation if the estimated temperature of the hotspot exceeds the temperature threshold. 16. The method of claim 15 , wherein initiating temperature mitigation comprises commanding a clock source to reduce a frequency of a clock signal, commanding a power source to reduce a supply voltage, or both. 17. An apparatus for managing temperature, comprising: means for receiving temperature readings from a plurality of temperature sensors on a chip; means for determining a plurality of power values based on the temperature readings; means for determining a plurality of temperature values based on the determined power values, the determined temperature values corresponding to a plurality of different locations on the chip; and means for estimating a temperature of a hotspot on the chip based on the determined temperature values; wherein the means for determining the power values comprises means for determining the power values using influence coefficients relating the power values to temperature changes at the temperature sensors. 18. The apparatus of claim 17 , wherein the means for estimating the temperature of the hotspot comprises means for determining a largest one of the determined temperature values. 19. The apparatus of claim 18 , further comprising means for estimating a location of the hotspot based on the location corresponding to the largest one of the determined temperature values. 20. The apparatus of claim 17 , wherein each of the power values corresponds to power at a respective one of a plurality of blocks on the chip. 21. The apparatus of claim 20 , wherein the blocks include one or more processors. 22. The apparatus of claim 17 , wherein the means for determining the temperature values comprises means for determining the temperature values using influence coefficients relating the power values to temperature changes at the different locations on the chip. 23. The apparatus of claim 17 , further comprising: means for comparing the estimated temperature of the hotspot to a temperature threshold; means for initiating temperature mitigation if the estimated temperature of the hotspot exceeds the temperature threshold. 24. The apparatus of claim 23 , wherein the means for initiating temperature mitigation comprises means for commanding a clock source to reduce a frequency of a clock signal, means for commanding a power source to reduce a supply voltage, or both.

Assignees

Inventors

Classifications

  • G05F1/463Primary

    Sources providing an output which depends on temperature · CPC title

  • Thermometers specially adapted for specific purposes · CPC title

  • comprising thermal management · CPC title

  • Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

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What does patent US9971368B2 cover?
In one embodiment, a temperature management system comprises a plurality of temperature sensors on a chip, and a temperature manager. The temperature manager is configured to receive a plurality of temperature readings from the temperature sensors, to determine a plurality of power values based on the temperature readings, to determine a plurality of temperature values based on the determined p…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification G05F1/463. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 15 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).