Method of fabricating artificial electronic skin

Patent metadata

Field	Value
Publication number	US-9968438-B2
Application number	US-201514935395-A
Country	US
Kind code	B2
Filing date	Nov 7, 2015
Priority date	Apr 27, 2015
Publication date	May 15, 2018
Grant date	May 15, 2018

Abstract

High resolution active matrix nanowire circuits enable a flexible platform for artificial electronic skin having pressure sensing capability. Comb-like interdigitated nanostructures extending vertically from a pair of opposing, flexible assemblies facilitate pressure sensing via changes in resistance caused by varying the extent of contact among the interdigitated nanostructures. Electrically isolated arrays of vertically extending, electrically conductive nanowires or nanofins are formed from a doped, electrically conductive layer, each of the arrays being electrically connected to a transistor in an array of transistors. The nanowires or nanofins are interdigitated with further electrically conductive nanowires or nanofins mounted to a flexible handle.

First claim

What is claimed is:

1. A method of fabricating artificial electronic skin comprising:
obtaining a first assembly including a plurality of transistors, a semiconductor layer, a plurality of active regions within the semiconductor layer, the active regions forming parts of the transistors, and a plurality of electrically isolated, first arrays of electrically conductive first nanostructures, each first array being electrically connected to one of the transistors;
obtaining a second assembly including a flexible handle and a plurality of electrically conductive second nanostructures secured to and extending from the flexible handle;
positioning one or more spacers between the first and second assemblies, and
mounting the first assembly to the second assembly, causing the first and second nanostructures of the first and second assemblies to be interdigitated.

2. The method of claim 1 , further including electrically connecting the second nanostructures to a reference potential.

3. The method of claim 1 , wherein the first arrays of first nanostructures are comprised of doped semiconductor material and are between 500 nm-5 μm in height.

4. The method of claim 3 , wherein the step of obtaining the first assembly includes:
obtaining a semiconductor-on-insulator substrate, the substrate including the semiconductor layer, a handle, an electrically insulating layer between the semiconductor layer and the handle, and a doped, electrically conductive layer between the handle and the electrically insulating layer;
forming the plurality of electrically isolated active regions within the semiconductor layer;
forming the transistors in the active regions using the semiconductor layer of the substrate;
forming electrical conductors electrically connecting the transistors to the doped, electrically conductive layer;
removing the handle, thereby exposing one or more portions of the doped, electrically conductive layer, and
forming the plurality of electrically isolated, first arrays of electrically conductive first nanostructures as arrays of vertically extending, electrically conductive nanowires or nanofins from the doped, electrically conductive layer, each of the nanowires or nanofins extending vertically with respect to the semiconductor layer.

5. The method of claim 4 , wherein the step of forming the plurality of first arrays of electrically conductive nanostructures further includes:
forming a plurality of arrays of dots over the doped, electrically conductive layer, the dots having etch selectivity with respect to the doped, electrically conductive layer,
etching the doped, electrically conductive layer to form nanowires from the doped, electrically conductive layer beneath the dots, and
removing the dots.

6. The method of claim 4 , wherein the step of forming the plurality of first arrays of electrically conductive nanostructures further includes:
forming a plurality of arrays of fin-shaped structures over the doped, electrically conductive layer, the fin-shaped structures having etch selectivity with respect to the doped, electrically conductive layer,
etching the doped, electrically conductive layer to form nanofins from the doped, electrically conductive layer beneath the fin-shaped structures, and
removing the fin-shaped structures.

7. The method of claim 4 , wherein the step of obtaining the second assembly includes forming a plurality of second arrays of polymeric nanostructures integral with the flexible handle and depositing an electrically conductive material on the second arrays of polymeric nanostructures to form electrically connected second arrays of the second nanostructures.

8. The method of claim 4 , wherein the step of obtaining the second assembly includes forming a doped silicon layer on the flexible handle and forming a plurality of electrically connected second arrays of the second nanostructures from the doped silicon layer.

9. The method of claim 1 , further including electrically connecting the transistors to column and row selectors.

Assignees

• IBM

Inventors

• Hekmatshoartabari Bahman
• Shahidi Ghavam G
• Shahrjerdi Davood

Classifications

• Y10T29/49103

  Strain gauge making · CPC title

• G01L5/228

  using tactile array force sensors · CPC title

• B82Y15/00

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• A61F2002/7635

  for measuring force, pressure or mechanical tension · CPC title

• A61F2/76

  Means for assembling, fitting or testing prostheses, e.g. for measuring or balancing, {e.g. alignment means} · CPC title