Solid-state relay including an electronic current detection block

Patent metadata

Field	Value
Publication number	US-9966942-B2
Application number	US-201615012098-A
Country	US
Kind code	B2
Filing date	Feb 1, 2016
Priority date	Feb 2, 2015
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

The present invention relates to a solid-state relay including a power semiconductor switch device connected between a first electrical terminal and a second electrical terminal and having a command terminal. An electronic driving block is adapted to generate a command signal applied to the command terminal to switch the at least one semiconductor switch device from a closed/open state to an open/closed state to disconnect/connect the first electrical circuit portion from/to the second portion of the electrical circuit. An electronic block detects a current which crosses the power semiconductor switch device. The electronic detection block includes a first electronic device adapted to generate a first signal indicative of a difference of potential between the first and second terminals generated by the current which crosses a total resistance present between the first and second terminals of the power semiconductor switch device in the closed state. The total resistance comprises the sum of a first resistance associated with the semiconductor switch device in the closed state and of second bonding resistances associated with an electrical connection between one of the conductive terminals and the respective either first or second electrical terminal.

First claim

The invention claimed is:

1. A solid-state relay electrically actuated to disconnect/connect a first portion of an electrical circuit from/to a second portion of said electrical circuit, comprising:
at least one power semiconductor switch device connected between a first electrical terminal of the relay connected to said first electrical circuit portion and a second electrical terminal of the relay connected to said second electrical circuit portion, respectively, by respective conductive terminals, and having a command terminal,
an electronic opto-isolated driving element of said at least one power semiconductor switch device adapted to generate a command signal applied to said command terminal to switch the at least one power semiconductor switch device from a closed/open state to an open/closed state to disconnect/connect the first electrical circuit portion from/to the second portion of said electrical circuit;
an amplifier for detecting a current which crosses said at least one power semiconductor switch device,
and having a first input and a second input connected to said first and second electrical terminals, respectively, adapted to generate a first signal indicative of a difference of potential between the first and second terminals generated by the current which crosses a total resistance present between the first and second terminals of the at least one power semiconductor switch device in the closed state,
wherein said total resistance comprises the sum of a first resistance associated with the semiconductor switch device in the closed state and of second bonding resistances each associated with an electrical connection between one of said conductive terminals and the respective either said first or second electrical terminal,
and wherein said electronic opto-isolated driving element is adapted to receive an opening/closing control signal, to further receive an enabling/disabling signal depending on said first signal, and is further adapted to generate said command signal on the basis of the opening/closing control signal and of the enabling/disabling signal.

2. The solid-state relay as set forth in claim 1 , wherein when said opening/closing control signal determines the closed state of the one power semiconductor switch device, said electronic opto-isolated driving element is adapted to disable the one power semiconductor switch device when the enabling/disabling signal is a disabling signal.

3. The solid-state relay as set forth in claim 1 , further comprising a processing unit operatively associated with the solid-state relay and distinct from said electronic opto-isolated driving element, said processing unit being adapted to receive the first signal to detect said current according to a processing performed on said first signal.

4. The solid-state relay as set forth in claim 3 , further comprising a thermistor adapted to generate a second signal indicative of a temperature of said power semiconductor switch device, said second signal being made available to the processing unit, said processing unit being adapted to detect said current which crosses the at least one power semiconductor device in the closed state according to a processing performed starting from the first signal and the second signal.

5. The solid-state relay as set forth in claim 1 , wherein one of said second bonding resistances is sized and adapted according to a predetermined maximum operational current value for the one power semiconductor switch device and to a predetermined non-tolerable overcurrent value, higher than said maximum operational value, so that said second bonding resistance operates as a fuse and melts at current values between the maximum operational value and the overcurrent value, thus disconnecting one of the conductive terminals from the respective either first or second electrical terminal.

6. The solid-state relay as set forth in claim 4 , wherein said electronic opto-isolated driving element includes an output terminal connected to an enabling pin of a driver device, said driver device being provided with an output pin connected to the command terminal of the one power semiconductor switch device, said electronic opto-isolated driving element being adapted to generate the opening/closing control signal according to a control signal applied to the solid-state relay from the outside.

7. The solid-state relay as set forth in claim 6 , wherein said processing unit comprises a microcontroller having:
a first input pin connected to an output of the amplifier to receive the aforesaid first signal;
a second input pin connected to a first output of the thermistor to receive the aforesaid second signal;
an output pin operatively connected to a disabling pin of the driver device by a first logical port to supply a third signal to said disabling pin.

8. The solid-state relay as set forth in claim 7 , wherein said first logical port is an OR logical port with two inputs having one of the two inputs connected to the output pin of the microcontroller and an output connected to the disabling pin of the driver device.

9. The solid-state relay as set forth in claim 4 , wherein said thermistor is connected in series to a further resistor between a power supply potential and a ground reference potential of the relay, the second signal being made available on an intermediate output node between said thermistor and the further resistor.

10. The solid-state relay as set forth in claim 7 , further comprising an overcurrent protection circuit which comprises:
a comparator device, having a respective first input terminal connected to the output of the amplifier to receive said first signal and a second input terminal adapted to receive a threshold signal, said comparator comprising a respective output terminal;
a second logical port with two inputs, having a first input connected to the respective output terminal of the comparator and a second input terminal connected to the output terminal of the opto-isolated driving element.

11. The solid-state relay as set forth in claim 10 , wherein said second logical port is an AND port adapted to receive, on the second input, the reverse of the logical signal present on the output terminal of the opto-isolated driving element.

12. The solid-state relay as set forth in claim 7 , further comprising an opto-isolated interface device having data transceiver terminals connected to corresponding data transceiver pins of the microcontroller.

13. The solid-state relay as set forth in claim 6 , further comprising an overcurrent protection circuit which comprises:
a comparator device, having a respective first input terminal connected to the first electrical terminal to receive the voltage between the first and second terminals and the second input terminal adapted to receive a threshold signal, said comparator comprising a respective output terminal;
a logical port with two inputs, having a first input connected to the respective output terminal of the comparator and a second input terminal connected to the output terminal of the opto-isolated driving element.

14. The solid-state relay as set forth in claim 13 , wherein said logical port is an AND port adapted to receive, on the second input, the reverse of the logical signal present on the output terminal of the opto-isolated driving element and having a respective output connected to the driver device.

15. The solid-state relay as set forth in claim 4 , wherein said
thermistor is connected in series to a further resistor between a power supply potential and a ground reference potential of the relay, such a second signal being available on an outp

Assignees

• Magneti Marelli Spa

Inventors

• Pritelli Danilo
• Suglia Rosanna
• Ciampolini Franco
• Aurilio Gianluca

Classifications

• H03K17/687 Primary

  the devices being field-effect transistors · CPC title

• B60L11/1851

  Operations & Transport · mapped topic

• H02H3/087 Primary

  for DC applications · CPC title

• H02H7/18

  for batteries; for accumulators · CPC title

• B60L11/18

  Operations & Transport · mapped topic