Thin film transistor, display panel and display apparatus

Patent metadata

Field	Value
Publication number	US-9966444-B2
Application number	US-201514801445-A
Country	US
Kind code	B2
Filing date	Jul 16, 2015
Priority date	Oct 27, 2014
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

Disclosed is a thin film transistor, including a gate electrode, a source electrode and a drain electrode. The source electrode includes a loop structure with an opening, and a width of the opening is less than a maximum width of an inner ring of the loop structure of the source electrode in a direction identical to a direction of the width of the opening. The drain electrode is surrounded by the loop structure, and is not in contact with the source electrode. The drain electrode is distant from the inner ring of the loop structure of the source electrode at a same interval.

First claim

What is claimed is:

1. A thin film transistor (TFT), comprising a gate electrode, a source electrode and a drain electrode,
wherein the source electrode comprises a first round loop structure with a first gap, a width of the first gap is less than a maximum width of an inner ring of the first round loop structure of the source electrode in a direction identical to a direction of the width of the first gap;
the drain electrode comprises a second round loop structure with a second gap, the drain electrode is surrounded by the first round loop structure and is not in contact with the source electrode; and
the drain electrode is distant from the inner ring of the first round loop structure of the source electrode at a constant interval,
wherein the source electrode further comprises a first projecting portion arranged inside the first round loop structure and connected to the first round loop structure and the drain electrode further comprises a second projecting portion arranged outside the second round loop structure and connected to the second round loop structure,
wherein the center points of the second gap and the first gap, respectively.

2. A display panel, comprising the thin film transistor (TFT) according to claim 1 .

3. A display apparatus, comprising the display panel according to claim 2 .

4. The TFT according to claim 1 , wherein the first projecting portion is in the middle of the second gap.

5. The TFT according to claim 1 , wherein the second projecting portion is in the middle of the first gap.

6. The TFT according to claim 1 , wherein a width of the second gap is less than a maximum width of an inner ring of the second round loop structure of the drain electrode in a direction identical to a direction of the width of the second gap.

7. The TFT according to claim 1 , wherein the first projecting portion and the second projecting portion are not extended beyond the first round loop structure.

Assignees

• Boe Technology Group Co Ltd
• Chongqing Boe Optoelectronics Tech Co Ltd
• Chongqing Boe Optoelectronics Tech Co Ltd

Inventors

• Wang Wu
• Qiu Haijun
• Shang Fei
• Wang Guolei

Classifications

• G02F1/1362

  Active matrix addressed cells {(G02F1/134336, G02F1/134363 take precedence)} · CPC title

• H01L29/786

  Electricity · mapped topic

• H01L29/41733 Primary

  Electricity · mapped topic

• H10D30/67 Primary

  Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} · CPC title

• H10D30/6729 Primary

  characterised by the electrodes · CPC title