Ion flow barrier structure for interconnect metallization

Patent metadata

Field	Value
Publication number	US-9966305-B2
Application number	US-201615340153-A
Country	US
Kind code	B2
Filing date	Nov 1, 2016
Priority date	Feb 16, 2016
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

A method for forming an ion flow barrier between conductors includes forming a barrier material through a via in an interlevel dielectric layer and onto a first metal layer and recessing the barrier material to form a thickness of the barrier material on the first metal layer in the via, the thickness forming an ion flow barrier. A second metal layer is deposited in the via over the ion flow barrier such that, during operation, the ion flow barrier reduces ion flow between the first metal layer and the second metal layer while maintaining low resistance.

First claim

What is claimed is:

1. A device having an ion flow barrier between conductors, comprising:
a first metal layer;
an interlevel dielectric layer formed on the first metal layer and having a via formed through the interlevel dielectric layer;
an ion flow barrier formed in the via and having a thickness of barrier material, the ion flow barrier including a material different from the first metal layer; and
a second metal layer formed on the ion flow barrier in the via such that the ion flow barrier is interposed between the first and second metal layers and, during operation, the ion flow barrier reduces ion flow between the first metal layer and the second metal layer while maintaining low resistance.

2. The device as recited in claim 1 , wherein the ion flow barrier includes one or more of W, Mo, Ta, Ru or TiW or alloys thereof.

3. The device as recited in claim 1 , wherein the ion flow barrier includes one or more of Pt, Pd, Ni, or alloys of thereof reacted with the first metal layer.

4. The device as recited in claim 1 , further comprising a liner formed on sidewalls of the via.

5. The device as recited in claim 1 , wherein the ion flow barrier includes a thickness of between 0.5 nm and 10 nm.

6. The device as recited in claim 1 , further comprising an additional ion flow barrier formed above or in the via.

7. The device as recited in claim 1 , wherein the second metal layer forms a contact in the via.

8. The device as recited in claim 1 , wherein the second metal layer forms a metal line in a trench formed in the interlevel dielectric layer.

9. The device as recited in claim 1 , wherein the ion flow barrier includes one or more of CuPt or CuPtW.

Assignees

• IBM

Inventors

• Demarest James J
• Kelly James J
• Motoyama Koichi
• Penny Christopher J
• Van Der Straten Oscar

Classifications

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title

• H10W20/064

  by modifying the conductivity of conductive parts, e.g. by alloying · CPC title

• H10W20/062

  by smoothing of conductive parts, e.g. by planarisation · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title