Host bridge with cache hints
US-2015261679-A1 · Sep 17, 2015 · US
US9965350B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9965350-B2 |
| Application number | US-201615281690-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 30, 2016 |
| Priority date | Sep 30, 2016 |
| Publication date | May 8, 2018 |
| Grant date | May 8, 2018 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method of maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system includes issuing, with a processor executing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction including a plurality of device table entries. The method also includes determining, with a host bridge processor, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction, and pinning, with the host bridge processor, a device table entry from a device table based on the determination.
Opening claim text (preview).
What is claimed is: 1. A method of maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system, the method comprising: issuing, via a processor executing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction comprising a plurality of device table entries; determining, via a host bridge processor, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction; and pinning, via the host bridge processor, a device table entry from a device table based on the determination. 2. The method of claim 1 , wherein the pinning prevents cache eviction due to a transaction being incomplete. 3. The method of claim 1 , wherein the pinning comprises pinning any device table entry associated with the CRC transaction to protect the device table entry from eviction from the device table when the CRC transaction is active. 4. The method of claim 3 , wherein the CRC transaction is active if the CRC transaction is ongoing or if a CRC update is ongoing. 5. The method of claim 3 , further comprising maintaining, via the host bridge processor, a state machine with a current state of the CRC transaction. 6. The method of claim 5 , further comprising setting the state machine included in the host bridge processor to an operation complete state when the CRC transaction is not active. 7. The method of claim 1 , wherein the host bridge processor is configured to unpin the pinned CRC transaction by receiving a force purge from the processor. 8. A computer program product comprising a computer readable storage medium having program instructions for maintaining a device table cache (DTC) included in a Synchronous input/output (I/O) computing system, the program instructions executable by one or more processors to perform: issuing an operating system running on the Synchronous I/O computing system, a Synchronous I/O command indicating a request to perform a device table entry transaction comprising a plurality of device table entries, each of the plurality of device table entries having an error information portion and a total data length to be transferred; issuing a Synchronous I/O command indicating a request to perform a device table entry transaction comprising a plurality of device table entries; determining, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction; and pinning a device table entry from a device table based on the determination. 9. The computer program product of claim 8 , wherein the pinning prevents cache eviction due to a transaction being incomplete. 10. The computer program product of claim 8 , wherein the pinning comprises pinning any device table entry associated with the CRC transaction to protect the device table entry from eviction from the device table when the CRC transaction is active. 11. The computer program product of claim 10 , wherein the CRC transaction is active if the CRC transaction is ongoing or if a CRC update is ongoing. 12. The computer program product of claim 10 , further comprising maintaining state machine with a current state of the CRC transaction. 13. The computer program product of claim 12 , further comprising setting the state machine included in the host bridge processor to an operation complete state when the CRC transaction is not active. 14. The computer program product of claim 8 , wherein the host bridge processor is configured to unpin the pinned CRC transaction by receiving a force purge from the processor. 15. A Synchronous input/output (I/O) computing system configured to maintain a device table cache (DTC), the system comprising a host bridge processor and a processor executing an operating system running on the Synchronous I/O computing system, the computing system configured to: issue a Synchronous I/O command indicating a request to perform a device table entry transaction comprising a plurality of device table entries; determine, based on device table information, whether the device table entry transaction is associated with a cyclic redundancy check (CRC) transaction; and pin a device table entry from a device table based on the determination. 16. The system of claim 15 , wherein the pinning prevents cache eviction due to a transaction being incomplete. 17. The system of claim 15 , wherein the pinning comprises pinning any device table entry associated with the CRC transaction to protect the device table entry from eviction from the device table when the CRC transaction is active. 18. The system of claim 17 , wherein the CRC transaction is active if the CRC transaction is ongoing or if a CRC update is ongoing. 19. The system of claim 18 , further comprising: maintaining a state machine with a current state of the CRC transaction; and setting the state machine included in the host bridge processor to an operation complete state when the CRC transaction is not active. 20. The system of claim 15 , wherein the host bridge processor is configured to unpin the pinned CRC transaction by receiving a force purge from the processor.
Specific encoding of data in memory or cache · CPC title
to protect a block of data words, e.g. CRC or checksum (G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00) · CPC title
with special data handling, e.g. priority of data or instructions, handling errors or pinning · CPC title
Physics · mapped topic
Resource optimization · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.