Error checking in out-of-order task scheduling

US9965321B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9965321-B2
Application numberUS-201113316344-A
CountryUS
Kind codeB2
Filing dateDec 9, 2011
Priority dateDec 9, 2011
Publication dateMay 8, 2018
Grant dateMay 8, 2018

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  5. First independent claim

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Abstract

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One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, and executing the compute task.

First claim

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The invention claimed is: 1. A method of error-checking a compute task, the method comprising: receiving a pointer to a task metadata structure that is associated with a compute task, wherein the task metadata structure includes a plurality of execution parameters that includes a first execution parameter that indicates a starting address of a program to be executed for the task metadata structure; storing the pointer in a scheduler table; determining that the task metadata structure is ready for execution; retrieving the pointer from the scheduler table to schedule the compute task for execution; after retrieving the pointer and prior to launching one or more cooperative thread arrays, determining via an error-check procedure that there are no errors associated with the task metadata structure, wherein the error-check procedure comprises reading configuration data and comparing the configuration data against one or more parameters included in the task metadata structure; and launching the one or more cooperative thread arrays to execute the task metadata structure. 2. The method of claim 1 , wherein the task metadata structure includes initialization parameters that configure a streaming multiprocessor to execute at least one of the one or more cooperative thread arrays, and scheduling parameters that control the scheduling of the compute task. 3. The method of claim 2 , wherein the one or more parameters comprise at least one of the initialization parameters, the scheduling parameters, and the execution parameters. 4. The method of claim 2 , wherein the error-check procedure comprises detecting a signal that attempts to invalidate the compute task when the compute task is in an active, executing state. 5. The method of claim 2 , wherein the error-check procedure returns an error when the initialization parameters specify a size of a shared memory to be used by the compute task that is the same as a size of a local memory to be used by the compute task. 6. The method of claim 2 , wherein the error-check procedure returns an error when the initialization parameters specify a pre-defined register consumption per-CTA value that will be exceeded when the compute task is executed. 7. The method of claim 2 , wherein the error-check procedure returns an error when the initialization parameters specify a throttled local memory size value that exceeds a non-throttled local memory size value, or when the initialization parameters specify a throttled shared memory count value that exceeds a non-throttled shared memory count value, wherein a number of threads not exceeding a maximum number may concurrently access the throttled local memory and throttled shared memory. 8. The method of claim 2 , wherein the scheduling parameters include a bit indicating whether the task metadata structure comprises a grid task metadata structure or a queue task metadata structure, a fixed number of cooperative thread arrays being launched to execute the grid task metadata structure, and a variable number of cooperative thread arrays being launched to execute the queue task metadata structure. 9. The method of claim 2 , wherein the initialization parameters include one or more bits indicating whether one or more caches included in a plurality of caches are to be invalidated when the one or more cooperative thread arrays are launched. 10. The method of claim 2 , wherein the initialization parameters include a bit indicating whether a constant buffer bind is valid. 11. The method of claim 2 , wherein the initialization parameters include a bit indicating whether data from a constant buffer is invalidated in a cache before the one or more cooperative thread arrays are launched. 12. The method of claim 1 , wherein the task metadata structure further comprises cooperative thread array state associated with the one or more cooperative thread arrays. 13. The method of claim 12 , wherein a queue is associated with the task metadata structure, the queue stores data that is related to the compute task and is to be processed by the one or more cooperative thread arrays, and the cooperative thread array state includes one or more pointers to entries within the queue. 14. The method of claim 1 , wherein the task metadata structure is part of a linked list of different task metadata structures having similar execution priority. 15. The method of claim 14 , wherein the pointer comprises either a head pointer or a tail pointer for the linked list. 16. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to error-check a compute task, by performing the steps of: receiving a pointer to a task metadata structure that is associated with a compute task, wherein the task metadata structure includes a plurality of execution parameters that includes a first execution parameter that indicates a starting address of a program to be executed for the task metadata structure; storing the pointer in a scheduler table; determining that the task metadata structure is ready for execution; retrieving the pointer from the scheduler table to schedule the compute task for execution; after retrieving the pointer and prior to launching one or more cooperative thread arrays, determining via an error-check procedure that there are no errors associated with the task metadata structure, wherein the error-check procedure comprises reading configuration data and comparing the configuration data against one or more parameters included in the task metadata structure; and launching the one or more cooperative thread arrays to execute the task metadata structure. 17. The non-transitory computer-readable storage medium of claim 16 , wherein the task metadata structure includes initialization parameters that configure a streaming multiprocessor to execute at least one of the one or more cooperative thread arrays, and scheduling parameters that control the scheduling of the compute task. 18. A system for error-checking compute tasks, the system comprising: a memory that is configured to store a task metadata structure corresponding a compute task; and a multi-threaded processor that is configured to: receive a pointer to a task metadata structure that is associated with a compute task, wherein the task metadata structure includes a plurality of execution parameters that includes a first execution parameter that indicates a starting address of a program to be executed for the task metadata structure; store the pointer in a scheduler table; determine that the task metadata structure is ready for execution; retrieve the pointer from the scheduler table to schedule the compute task for execution; after retrieving the pointer and prior to launching one or more cooperative thread arrays, determine via an error-check procedure that there are no errors associated with the task metadata structure, wherein the error-check procedure comprises reading configuration data and comparing the configuration data against one or more parameters included in the task metadata structure; and launch the one or more cooperative thread arrays to execute the task metadata structure. 19. The system of claim 18 , wherein the task metadata structure includes initialization parameters that configure a streaming multiprocessor to execute at least one of the one or more cooperative thread arrays, and scheduling parameters that control the scheduling of the compute task. 20. The system of claim 19 , wherein the one or more parameters comprise a

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Classifications

  • G06F9/4843Primary

    by program, e.g. task dispatcher, supervisor, operating system · CPC title

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What does patent US9965321B2 cover?
One embodiment of the present invention sets forth a technique for error-checking a compute task. The technique involves receiving a pointer to a compute task, storing the pointer in a scheduling queue, determining that the compute task should be executed, retrieving the pointer from the scheduling queue, determining via an error-check procedure that the compute task is eligible for execution, …
Who is the assignee on this patent?
Duluk Jr Jerome F, Purcell Timothy John, Hall Jesse David, and 2 more
What technology area does this patent fall under?
Primary CPC classification G06F9/4843. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 08 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).