Solder pads, methods, and systems for circuitry components

US9961770B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9961770-B2
Application numberUS-201414337377-A
CountryUS
Kind codeB2
Filing dateJul 22, 2014
Priority dateJul 22, 2014
Publication dateMay 1, 2018
Grant dateMay 1, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Solder pads, systems, and related methods are provided. A first or second pad include at least one shape for increasing a number of edges available to align at least one part to be soldered thereto. Each solder pad can occupy a same surface area of the substrate. A plurality of circuit elements can be provided over the plurality of solder pads, where some of the circuit elements occupy different surface areas of the substrate and/or the solder pad. A method of providing a solder pad includes providing a substrate, providing a solder pad over the substrate, and providing at least one shape in the solder pad for increasing a number of edges available to align at least one part to be soldered thereto. The pads can attach for example to a surface-mount ceramic component, a submount-free component, a leadframe component and/or a chip on board component.

First claim

Opening claim text (preview).

What is claimed is: 1. A solder pad for attaching to a plurality of different parts, the solder pad comprising: a first pad having a first surface area; a second pad having a second surface area that is greater than the first surface area; and a gap disposed between the first pad and the second pad, wherein the first pad and the second pad each comprise a first edge and a second edge, wherein the first edge of each of the first and second pads is an innermost edge closest to the gap, wherein the second edge of the first pad is an outermost edge of a total surface area of the solder pad that is a farthest distance away from the gap, wherein the second edge of the second pad is an outermost edge of the total surface area of the solder pad that is a farthest distance away from the gap, wherein each of the first edges comprises at least one slot, with an outer slot edge, wherein each of the second edges comprises at least one notch disposed in an outermost corner thereof for increasing a number of edges available to align at least one part to be soldered thereto, wherein the at least one notch comprises a first notch edge and a second notch edge, wherein the first notch edge is collinear with the outer slot edge, wherein the second notch edge is orthogonal to the outer slot edge and has a width less than an overall width of the solder pad, and wherein an edge of the at least one slot is coplanar with the first edge in which the edge is formed, such that the edge is surrounded on both sides by the first edge. 2. The solder pad according to claim 1 , wherein the at least one slot is substantially orthogonal to the gap. 3. The solder pad according to claim 1 , wherein the first and second edges are substantially parallel to the gap, wherein the at least one slot comprises multiple slots, and wherein the at least one notch comprises multiple notches. 4. The solder pad according to claim 1 , wherein the first and second pads comprise different shapes. 5. The solder pad according to claim 1 , wherein the gap comprises a width that is between approximately 0.2 millimeters (mm) and 2 mm. 6. The solder pad according to claim 1 , wherein the first and second pads have an overall width that is between approximately 2.0 millimeters (mm) and 5.0 mm. 7. The solder pad according to claim 1 , wherein the solder pad is disposed over a circuit board. 8. The solder pad according to claim 1 , wherein a solid state lighting device is disposed over the solder pad. 9. A solder pad system for facilitating attachment to a plurality of different parts, the system comprising: a substrate; a plurality of solder pads disposed over the substrate, wherein each of the plurality of solder pads comprises a same footprint occupying a same surface area of the substrate, wherein each of the plurality of solder pads comprises: a first pad having a first shape; a second pad having a second shape that is different than the first shape; and a gap separating the first pad and the second pad, wherein the first pad and the second pad each comprises a first edge and a second edge, wherein the first edge is an innermost edge of each shape closest to the gap, wherein the second edge is an outermost edge of a total surface area of a respective one of the plurality of solder pads that is farthest from the gap, wherein each of the first edges comprises at least one slot having at least one slot edge, wherein each of the second edges comprises at least one notch disposed in an outermost corner thereof; wherein the at least one notch comprises a first notch edge and a second notch edge, wherein the first notch edge is collinear with the at least one slot edge, wherein the second notch edge is orthogonal to the at least one slot edge and has a width less than an overall width of the respective one of the plurality of solder pads, and wherein an edge of the at least one slot is coplanar with the first edge in which the edge is formed, such that the edge is surrounded on both sides by the first edge; and a plurality of circuit elements disposed over the plurality of solder pads, wherein the plurality of circuit elements comprises at least two different footprint sizes, footprint shapes, and/or footprint designs occupying different surface areas of the substrate. 10. The solder pad system according to claim 9 , wherein the first and second pads each comprise a plurality of slots disposed therein, increasing a number of edges available to align at least one part to be soldered thereto, and wherein each of the plurality of slots is oriented substantially orthogonal to the gap. 11. The solder pad system according to claim 9 , wherein the plurality of circuit elements comprises a plurality of solid state lighting devices. 12. The solder pad system according to claim 9 , wherein the substrate comprises a circuit board. 13. A method of providing a solder pad for attaching a plurality of different circuitry components thereto, the method comprising: providing a substrate; forming a solder pad on the substrate, the solder pad comprising a first pad and a second pad, wherein the first pad is separated from the second pad by a gap, and wherein the first pad has a smaller surface area than the second pad; providing making at least one slot in each of the first pad and the second pad, increasing a number of edges available to align at least one part to be soldered thereto; and defining at least one notch in each of the first pad and the second pad, such that the at least one notch is disposed on an outermost corner of a total surface area of the solder pad away that is farthest away from the gap, and an edge of the at least one notch is collinear with an edge of the at least one slot. 14. The method according to claim 13 , further comprising selectively applying solder to portions of the solder pad. 15. The method according to claim 14 , wherein selectively applying the solder comprises stenciling the solder to portions of the solder pad. 16. The method according to claim 14 , further comprising placing a circuit element over the solder. 17. The method according to claim 16 , wherein the circuit element comprises a solid state emitter or a solid state emitter package. 18. The method according to claim 16 , further comprising heating and cooling the substrate to melt and harden the solder, respectively, thereby physically and electrically connecting the circuit element to the solder pad. 19. A device for a light emitter, comprising: a substrate; and a plurality of solder pads disposed on the substrate and configured to separately attach a plurality of different electrical components to the substrate, wherein each of the plurality of solder pads comprises: a first pad and a second pad, wherein the first pad has a smaller surface area than the second solder pad, wherein the first pad and the second pad each comprise a first edge and a second edge, wherein the first edge of each of the first and second pads is an innermost edge closest to the gap, wherein the second edge of the first pad is an outermost edge of a total surface area of a respective one of the plurality of solder pads that is a farthest distance away from the gap, wherein the second edge of the second pad is an outermost edge of the total surface area of the respective one of the plurality of solder pads that is a farthest distance away from the gap, wherein each of the first edges comprises at least one slot having an outer slot edge; wherein each of the second edges comprises at least o

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating · CPC title

  • having an array of bottom contacts, e.g. pad grid array or ball grid array components · CPC title

  • Self-alignment during soldering; Terminals, pads or shape of solder adapted therefor · CPC title

  • Surface mounted components · CPC title

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What does patent US9961770B2 cover?
Solder pads, systems, and related methods are provided. A first or second pad include at least one shape for increasing a number of edges available to align at least one part to be soldered thereto. Each solder pad can occupy a same surface area of the substrate. A plurality of circuit elements can be provided over the plurality of solder pads, where some of the circuit elements occupy differen…
Who is the assignee on this patent?
Cree Inc
What technology area does this patent fall under?
Primary CPC classification H05K1/111. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).