Transmit/receive beamforming signal generation

Patent metadata

Field	Value
Publication number	US-9960883-B1
Application number	US-201715488434-A
Country	US
Kind code	B1
Filing date	Apr 14, 2017
Priority date	Apr 14, 2017
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

Transmit and/or receive beamforming signal generation includes a voltage-controlled oscillator (VCO) for generating a lower or higher master frequency output signal in accordance with a selection of a lower or higher frequency carrier frequency. A local oscillator generates local oscillator signals in quadrature in response to the maser frequency output signal. One or more mixer stages generate sidebands in response to a received information signal and the local oscillator signals in quadrature. The one or more mixer stages generate an output information signal in response to high-side injection of lower sidebands of the developed sidebands when the lower frequency carrier frequency is selected, and generate the output information signal in response to low-side injection of higher sidebands of the developed sidebands when the higher frequency carrier frequency is selected. Multi-band operation of transmit and receive arrays can be performed.

First claim

What is claimed is:

1. A circuit, comprising:
a multiplication-order operation unit for receiving a master frequency signal, for generating a first derived frequency signal in response to the master frequency signal in accordance with a first multiplication-order operation, and for generating a second derived frequency signal in response to the first derived frequency signal in accordance with a second multiplication-order operation, wherein the second multiplication-order operation is a multiplication-order operation that is inverse to the first multiplication-order operation;
a first mixer stage for mixing in quadrature an input information signal in response to the first derived frequency signal to generate a first mixer stage output signal including components of the first derived frequency signal;
a trigonometric weighting scaler for trigonometrically scaling the input information signal in response to a trigonometric weight to generate a scaler output signal including components of the trigonometric weight;
a second mixer stage for mixing in quadrature the input information signal in response to the second derived frequency signal to generate a second mixer stage output signal including components of the second derived frequency signal; and
an output combiner for generating an output information signal, wherein the output information signal includes components of the first mixer stage output signal, the scaler output signal, and the second mixer stage output signal.

2. The circuit of claim 1 , wherein the input information signal is received via either an antenna or a digital-to-analog converter (DAC).

3. The circuit of claim 1 , wherein the second mixer stage output signal is generated in response to the first mixer stage output signal.

4. The circuit of claim 1 , wherein the first and second mixer stage are arranged to mix in quadrature in accordance with either a modulation operation or a demodulation operation.

5. The circuit of claim 1 , wherein the first and second mixer stage are arranged to mix in quadrature in accordance with: cos(ω LO1 +ω LO2 +ω BB )t=cos(ω LO1 t)cos(ω LO2 t)cos(ω BB t)−sin(ω LO1 t)sin(ω LO2 t)cos(ω BB t)−sin(ω LO1 t)cos(ω LO2 t)sin(ω BB t)−cos(ω LO1 t)sin(ω LO2 t)sin(ω BB t), where ti is time, ω LO1 is the first derived frequency signal in quadrature input signal having a frequency higher than a baseband frequency, ω LO2 is the second derived frequency signal in quadrature input signal and ω BB is the information signal in quadrature at the baseband frequency.

6. The circuit of claim 1 , wherein the output combiner is arranged to combine components of the first mixer stage output signal and the second mixer stage output signal in accordance with a current mode of operation.

7. The circuit of claim 1 , comprising a sideband combiner arranged to generate a single sideband output information signal in response to the second mixer stage output signal.

8. The circuit of claim 1 , wherein the trigonometric weighting scaler is arranged to selectively phase shift the output information signal.

9. The circuit of claim 1 , wherein the first multiplication-order operation is executed by converting energy from fundamental frequency to odd-order harmonics and wherein the second multiplication-order operation is executed by one or more divide-by-two digital dividers.

10. The circuit of claim 1 , wherein the first multiplication-order operation and the second multiplication-order operation are programmable.

11. The circuit of claim 1 , comprising a voltage controlled oscillator (VCO) for generating the master frequency signal operable at a frequency lower than a carrier frequency of the output information signal generated by the output combiner.

12. The circuit of claim 11 , wherein the VCO center operating frequency is a sub-harmonic of the carrier frequency of the output information signal generated by the output combiner.

13. The circuit of claim 1 , comprising a sideband combiner arranged to generate a single sideband output information signal in response to high-side injection of lower sidebands of the developed sidebands when a lower frequency carrier frequency is selected, and to generate the single sideband output information signal in response to low-side injection of higher sidebands of the developed sidebands when the higher frequency carrier frequency is selected, wherein the output combiner generates the output information signal in response to the single sideband output information signal, and wherein the selected carrier frequency is a frequency of either the input information signal or the output information signal.

14. A system, comprising:
a voltage controlled oscillator (VCO) for generating a master frequency output signal in accordance with a selection of either a lower frequency carrier frequency or a higher frequency carrier frequency, wherein the master frequency output signal is generated at a first VCO frequency when the lower frequency carrier frequency is selected, wherein the master frequency output signal is generated at a second VCO frequency higher than the first VCO frequency when the higher frequency carrier frequency is selected, and wherein the VCO includes a tuning range encompassing the first and second VCO frequencies;
a multiplication-order operation unit for generating local oscillator signals in quadrature in response to the maser frequency output signal; and
a first one or more mixer stages for developing sidebands in response to a first received information signal and the local oscillator signals in quadrature, wherein the one or more mixer stages are arranged to generate an output information signal in response to high-side injection of lower sidebands of the developed sidebands when the lower frequency carrier frequency is selected, and wherein the first one or more mixer stages are arranged to generate the first output information signal in response to low-side injection of higher sidebands of the developed sidebands when the higher frequency carrier frequency is selected.

15. The system of claim 14 , comprising:
a second one or more mixer stages for developing sidebands in response to a second received information signal and the local oscillator signals in quadrature, wherein the one or more mixer stages are arranged to generate a second output information signal in response to high-side injection of lower sidebands of the developed sidebands when the lower frequency carrier frequency is selected, and wherein the second one or more mixer stages are arranged to generate the second output information signal in response to low-side injection of higher sidebands of the developed sidebands when the lower frequency carrier frequency is selected.

16. The system of claim 15 , wherein the first one or more mixer stages are arranged to phase shift components of the first output information signal with respect to a first antenna in an antenna array, and wherein the second one or more mixer stages are arranged to phase shift components of the second output information signal with respect to a second antenna in the antenna array.

17. The system of claim 15 , wherein the first one or more mixer stages are arranged to phase shift components of the first input information signal with respect to a first antenna in an antenna array, wherein the second one or more mixer stages are arranged to phase shift components of the second input information signal with respect to a second antenna in the antenna array, wherein the first input information signal is received from the first antenna in the antenna array, and wherein the second input in

Assignees

• Texas Instruments Inc

Inventors

• Chakraborty Sudipto

Classifications

• H03M13/658

  Scaling by multiplication or division · CPC title

• G06F7/496 Primary

  Multiplying; Dividing · CPC title

• H04L1/0054 Primary

  Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms · CPC title

• H03M13/41

  using the Viterbi algorithm or Viterbi processors · CPC title

• H03M13/6597

  Implementations using analogue techniques for coding or decoding, e.g. analogue Viterbi decoder · CPC title