Methods of manufacturing semiconductor devices

Patent metadata

Field	Value
Publication number	US-9960169-B2
Application number	US-201615243248-A
Country	US
Kind code	B2
Filing date	Aug 22, 2016
Priority date	Sep 1, 2015
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

In a method of manufacturing a semiconductor device, mask patterns are formed on a semiconductor substrate. An organic layer is formed on the semiconductor substrate to cover the mask patterns. An upper portion of the organic layer is planarized using a polishing composition. The polishing composition includes an oxidizing agent and is devoid of abrasive particles.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, comprising:
forming mask patterns on a semiconductor substrate;
forming an organic layer on the semiconductor substrate to cover the mask patterns;
planarizing an upper portion of the organic layer using a polishing composition, the polishing composition including an oxidizing agent and being devoid of abrasive particles;
forming an object layer on the semiconductor substrate before forming the mask patterns, wherein forming the mask patterns includes forming first organic layer patterns on the object layer and forming spacers on sidewalls of the first organic layer patterns, wherein the organic layer fills spaces between the spacers and planarizing the upper portion of the organic layer includes forming second organic layer patterns between the spacers;
removing the spacers after forming the second organic layer patterns to form openings; and
etching the object layer through the openings.

2. The method of claim 1 , wherein the organic layer is formed of at least one of a polysilazane-based material, a polysiloxane-based material or a spin-on hardmask (SOH) material.

3. The method of claim 1 , wherein the polishing composition further includes at least one of a surfactant, a pH adjusting agent or a polishing accelerator.

4. The method of claim 3 , wherein the polishing composition is devoid of a dispersing agent for abrasive particles.

5. The method of claim 1 , further comprising etching an upper portion of the semiconductor substrate using the mask patterns to form a trench,
wherein the organic layer fills the trench.

6. The method of claim 1 , wherein at least a portion of the mask patterns serves as a bulk mask, and the organic layer includes a stepped portion protruding on the bulk mask.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Jun-Seok
• Kwon Byoung-Ho
• Kim Sang-Kyun
• Kim Yun-Jeong
• Park Seung-Ho
• Cui Hao
• Hwang In-Seak

Classifications

• H10P95/062 Primary

  involving a dielectric removal step · CPC title

• H10P95/08

  Planarisation of organic insulating materials · CPC title

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P50/71

  using masks for conductive or resistive materials · CPC title