Signal conversion device, processing device, communication system, and signal conversion method

Patent metadata

Field	Value
Publication number	US-9959899-B2
Application number	US-201715632766-A
Country	US
Kind code	B2
Filing date	Jun 26, 2017
Priority date	Jul 1, 2016
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

A signal conversion device includes a first converting section configured to convert a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line, into pulse signals including a first pulse train and a second pulse train; and a transmitting section configured to transmit the first pulse train through a fourth signal line and the second pulse train through a fifth signal line, wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and wherein the first converting section is configured to put successive pulses into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.

First claim

What is claimed is:

1. A signal conversion device comprising:
a first converting section configured to convert a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line, into pulse signals including a first pulse train and a second pulse train; and
a transmitting section configured to transmit the first pulse train through a fourth signal line and the second pulse train through a fifth signal line,
wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and
wherein the first converting section is configured to put successive pulses into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.

2. The signal conversion device of claim 1 , wherein:
the first converting section is configured to put successive pulses into one of the first pulse train or the second pulse train in response to a rising level transition of the control signal; and
the first converting section is configured put successive pulses into the other of the first pulse train or the second pulse train in response to a falling level transition of the control signal.

3. The signal conversion device of claim 1 , wherein the first converting section is configured to put first successive pulses into one of the first pulse train or the second pulse train in response to the level transition of the control signal, and after the first successive pulses, the first converting section puts second successive pulses into the other of the first pulse train or the second pulse train.

4. The signal conversion device of claim 1 , wherein the successive pulses include designation information that designates one of a plurality of the control target devices.

5. A processing device comprising:
a receiving section configured to receive the first pulse train and the second pulse train transmitted from the signal conversion device of claim 1 ;
a second converting section configured to convert the first pulse train and the second pulse train to the clock signal, the data signal, and the control signal; and
a processing section configured to perform predetermined processing based on the clock signal, the data signal, and the control signal.

6. The processing device of claim 5 , further comprising a transmitting section configured to transmit the first pulse train and the second pulse train received by the receiving section.

7. The processing device of claim 5 , wherein the processing section measures a cell voltage of a battery cell as the predetermined processing.

8. A communication system comprising:
a signal conversion device including
a first converting section configured to convert a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line, into pulse signals including a first pulse train and a second pulse train, and
a transmitting section configured to transmit the first pulse train through a fourth signal line and the second pulse train through a fifth signal line; and

a processing device including
a receiving section configured to receive the first pulse train and the second pulse train transmitted from the signal conversion device;
a second converting section configured to convert the first pulse train and the second pulse train to the clock signal, the data signal, and the control signal; and
a processing section configured to perform predetermined processing based on the clock signal, the data signal, and the control signal,

wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and
wherein the first converting section is configured to put successive pulses into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.

9. The communication system of claim 8 , wherein the processing device further includes a transmitting section configured to transmit the first pulse train and the second pulse train received at the receiving section.

10. The communication system of claim 9 , further comprising a plurality of the processing devices in which the transmitting section of an earlier-stage processing device is connected to the receiving section of a later-stage processing device.

11. The communication system of claim 10 , wherein:
a first-stage processing device of the plurality of processing devices receives the first pulse train and the second pulse train transmitted from the signal conversion device; and
a processing device other than the first-stage processing device of the plurality of processing devices receives the first pulse train and the second pulse train transmitted from an adjacent earlier-stage processing device.

12. The communication system of claim 11 , wherein:
each of the plurality of processing devices is configured to transmit, from its own transmitting section, data acquired by its own processing section or data transmitted from an earlier-stage processing device; and
a final-stage processing device of the plurality of processing devices is configured to transmit, to the signal conversion device, data acquired by its own processing section or data transmitted from an earlier-stage processing device.

13. The communication system of claim 10 , wherein, in each of the plurality of processing devices, the processing section is configured to measures a cell voltage of a battery cell as the predetermined processing.

14. The communication system of claim 10 , wherein:
the data signal includes designation information that designates one out of the plurality of processing devices; and
each of the plurality of processing devices performs the predetermined processing, in a case in which itself is designated by designation information included in the data signal converted by its own second converting section.

15. A signal conversion method comprising:
converting a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line into pulse signals including a first pulse train and a second pulse train,
wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and
wherein successive pulses are put into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.

Assignees

• Lapis Semiconductor Co Ltd

Inventors

• Kita Yukihiro

Classifications

• H04L25/0278

  Arrangements for impedance matching · CPC title

• H04L25/0272

  Arrangements for coupling to multiple lines, e.g. for differential transmission · CPC title

• G11B27/005

  Reproducing at a different information rate from the information rate of recording (for television signals H04N5/783) · CPC title

• G11B27/3027

  used signal is digitally coded · CPC title

• G11B20/10037 Primary

  A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof · CPC title