Multi-level pulser and related apparatus and methods

Patent metadata

Field	Value
Publication number	US-9958537-B2
Application number	US-201715645771-A
Country	US
Kind code	B2
Filing date	Jul 10, 2017
Priority date	Dec 2, 2015
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

Apparatus and methods are provided directed to a device, including at least one ultrasonic transducer, a multi-level pulser coupled to the at least one ultrasonic transducer; the multi-level pulser including a plurality of input terminals configured to receive respective input voltages, an output terminal configured to provide an output voltage, and a signal path between a first input terminal and the output terminal including a first transistor having a first conductivity type coupled to a first diode and, in parallel, a second transistor having a second conductivity type coupled to a second diode.

First claim

What is claimed is:

1. An apparatus, comprising:
at least one ultrasonic transducer on a first substrate; and
a multi-level pulser on a second substrate coupled to the at least one ultrasonic transducer, wherein the first substrate and the second substrate are different substrates, the multi-level pulser including:
a plurality of input terminals configured to receive respective input voltages;
an output terminal configured to provide an output voltage; and
a signal path between a first input terminal of the plurality of input terminals and the output terminal including a first transistor coupled to a first diode and, in parallel, a second transistor coupled to a second diode,
wherein the first transistor is either a pMOS transistor or an nMOS transistor and the second transistor is an NMOS transistor if the first transistor is a pMOS transistor or a pMOS transistor if the first transistor is an nMOS transistor.

2. The apparatus of claim 1 , further comprising a controller configured to control a charge and discharge of an output capacitance associated with the ultrasonic transducer so as to provide charge recycling.

3. The apparatus of claim 1 , wherein the multi-level pulser comprises a plurality of signal paths between respective input terminals of the plurality of input terminals and the output terminal, each signal path including a pMOS or nMOS transistor coupled to a first diode and, in parallel, a pMOS or nMOS transistor coupled to a second diode, wherein the pMOS or nMOS transistor coupled to the second diode is an nMOS transistor when the pMOS or nMOS transistor coupled to the first diode is a pMOS transistor, and wherein the pMOS or nMOS transistor coupled to the second diode is a pMOS transistor when the pMOS or nMOS transistor coupled to the first diode is an nMOS transistor.

4. The apparatus of claim 1 , wherein the output voltage is equal to a predetermined input voltage.

5. The apparatus of claim 1 , further comprising a capacitor coupled to the output terminal.

6. The apparatus of claim 1 , further comprising a resistor coupled to the output terminal.

7. The apparatus of claim 1 , wherein the first transistor is pMOS and the second transistor is nMOS.

8. The apparatus of claim 1 , wherein the first diode has an anode connected to the first transistor and a cathode connected to the output terminal.

9. The apparatus of claim 1 , wherein the second diode has a cathode connected to the second transistor and an anode connected to the output terminal.

10. An apparatus, comprising:
at least one ultrasonic transducer on a first substrate, and a level shifter on a second substrate coupled to the at least one ultrasonic transducer, wherein the first substrate and the second substrate are different substrates, the level shifter including:
an input terminal configured to receive an input voltage;
an output terminal configured to provide an output voltage level-shifted from the input voltage;
a capacitor coupled between the input terminal and the output terminal; and
a diode coupled in a reverse-biased configuration between an input to an active high voltage element and a first voltage of a high voltage power supply;
wherein the input of the active high voltage element is coupled to an output of the capacitor.

11. The apparatus of claim 10 , wherein the first substrate is a semiconductor substrate.

12. The apparatus of claim 10 , wherein the at least one ultrasonic transducer is a capacitive micromachined ultrasonic transducer (CMUT).

13. The apparatus of claim 10 , further comprising a pulser on the second substrate and coupled to the level shifter.

14. The apparatus of claim 10 , comprising a plurality of ultrasonic transducers including the at least one ultrasonic transducer, wherein the plurality of ultrasonic transducer are configured to apply high intensity focused ultrasound (HIFU).

Assignees

• Butterfly Network Inc
• Butterfly Networks Inc

Inventors

• Chen Kailiang
• Ralston Tyler S

Classifications

• G01S7/524 Primary

  Transmitters · CPC title

• H03K19/017545

  Coupling arrangements; Impedance matching circuits · CPC title

• G01S7/521

  Constructional features · CPC title

• A61B8/4483 Primary

  characterised by features of the ultrasound transducer · CPC title

• G01S7/5208

  with integration of processing functions inside probe or scanhead · CPC title