Energy storage apparatus
US-9053869-B2 · Jun 9, 2015 · US
US9954675B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9954675-B2 |
| Application number | US-201515532874-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 19, 2015 |
| Priority date | Dec 5, 2014 |
| Publication date | Apr 24, 2018 |
| Grant date | Apr 24, 2018 |
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The invention relates to a method for transmitting an actuation signal and a first data signal between a control device and an actuation device of a power semiconductor device. To minimize the expenditure for the operation of the physical transmission channels and the costs for the laying of the physical connection between control device and actuation device, the transmission of the actuation signal and the first data signal between the control device and the actuation device takes place simultaneously and via a common transmission channel, wherein the first data signal is combined with the actuation signal by means of a digital modulation method or coding method. A feedback signal and second data signal are transmitted in the opposite direction. A first coding length is shorter than the interval length of the actuation signal. A second coding length is shorter than the interval length of the feedback signal.
Opening claim text (preview).
What is claimed is: 1. A method for transmitting an actuation signal and a first data signal between a control device and an actuation device for a power semiconductor device, said method comprising: transmitting the actuation signal and the first data signal from the control device to the actuation device simultaneously and via a common transmission channel; combining the first data signal with the actuation signal by means of a digital modulation method or coding method; transmitting a feedback signal together with a second data signal in the opposite direction; using a first coding length which is shorter than the interval length of the actuation signal for the first data signal; and using a second coding length which is shorter than the interval length of the feedback signal for the second data signal. 2. The method of claim 1 , wherein the actuation signal and the first data signal are approximately in the form of a rectangle. 3. The method of claim 1 , wherein the feedback signal and the second data signal are approximately in the form of a rectangle. 4. The method of claim 1 , further comprising combining the second data signal with the feedback signal by the digital modulation method or the coding method. 5. The method of claim 1 , wherein the actuation signal is transmitted at a higher data rate than the first data signal and/or the feedback signal is transmitted at a higher data rate than the second data signal. 6. The method of claim 1 , wherein the first data signal is combined with the actuation signal using an XOR operation or an XNOR operation. 7. The method of claim 1 , wherein the second data signal is combined with the feedback signal using an XOR operation or an XNOR operation. 8. The method of claim 1 , wherein the first data signal is coded with the aid of pulse phase coding and/or pulse width coding, in particular by inversion. 9. The method of claim 1 , wherein the first data signal is coded with the aid of pulse phase coding and/or pulse width coding by inversion. 10. The method of claim 1 , wherein the second data signal is coded with the aid of pulse phase coding and/or pulse width coding, in particular by inversion. 11. The method of claim 1 , wherein the second data signal is coded with the aid of pulse phase coding and/or pulse width coding by inversion. 12. The method of claim 1 , wherein a plurality of first data signals is combined with the actuation signal. 13. The method of claim 1 , wherein a plurality of second data signals is combined with the feedback signal. 14. The method of claim 1 , wherein a multivalent first data signal is combined with the actuation signal. 15. The method of claim 1 , wherein a multivalent second data signal is combined with the feedback signal. 16. The method of claim 1 , further comprising transmitting digital information and/or data protocols. 17. An arrangement, comprising: a transmitter including a mixing device provided for combining an actuation signal with a first data signal and for combining a feedback signal with a second data signal; a transmission channel provided for transmitting the combination of the actuation signal with the first data signal and transmitting receiving the combination of the feedback signal with the second data signal; and a receiver provided for receiving the combination of the actuation signal with the first data signal and for receiving the combination of the feedback signal with the second data signal. 18. The arrangement of claim 17 , wherein the receiver comprises a device for detecting the synchronization time, a bit detection unit which is provided for recovering and outputting the first data signal and second data signal, an actuation detection unit which is provided for recovering and outputting the actuation signal and the feedback signal, and a phase-locked loop which is provided for supplying a reference time for the bit detection unit and the actuation detection unit. 19. A system, comprising: a control device; an actuation device interacting with the control device for digital transmission of an actuation signal and a first data signal in one direction and for digital transmission of a feedback signal together with a second data signal in another direction opposite to the one direction; an arrangement a transmitter including a mixing device provided for combining an actuation signal with a first data signal and for combining a feedback signal with a second data signal, a transmission channel provided for transmitting the combination of the actuation signal with the first data signal and transmitting receiving the combination of the feedback signal with the second data signal, and a receiver provided for receiving the combination of the actuation signal with the first data signal and for receiving the combination of the feedback signal with the second data signal; and a power semiconductor device actuated by the actuation device with an analog actuation signal. 20. The system of claim 19 , wherein the power semiconductor device has a power converter.
with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock (H04L7/0337 takes precedence) · CPC title
using DC to AC converters or inverters (H02P27/05 takes precedence) · CPC title
Arrangements for synchronous operation · CPC title
using a single bit, e.g. start stop bit · CPC title
Arrangements for reducing cross-talk between channels · CPC title
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