Digital signal input circuit

US9954672B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9954672-B1
Application numberUS-201715727727-A
CountryUS
Kind codeB1
Filing dateOct 9, 2017
Priority dateOct 9, 2016
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A digital signal input circuit including an isolating circuit and a voltage determining circuit is presented, where a first port of an input end of the isolating circuit receives a digital signal, an output end of the isolating circuit outputs the digital signal, and when the isolating circuit is open, the isolating circuit is configured to output a first level, or when the isolating circuit is closed, the isolating circuit is configured to output a second level; and the voltage determining circuit is configured to determine, according to a level of the digital signal, whether the isolating circuit is open or closed. According to the digital signal input circuit, the voltage determining circuit determines a level of a digital signal, thereby correctness of digital signal level conversion is increased.

First claim

Opening claim text (preview).

What is claimed is: 1. A digital signal input circuit, comprising: an isolating circuit, comprising: an isolating circuit input end having a first port and a second port, wherein the first port is connected to a digital input (DI) port of the digital signal input circuit and configured to receive a digital signal; and an isolating circuit output end is connected to a digital output (DO) port of the digital signal input circuit and configured to output a converted digital signal, wherein the isolating circuit is configured to: output a first level when the isolating circuit is open; and output a second level when the isolating circuit is closed; and a voltage determining circuit coupled to the isolating circuit, comprising: a voltage determining circuit input end connected to the DI port and configured to receive the digital signal; a voltage determining circuit output end coupled to the second port of the isolating circuit, wherein the voltage determining circuit is configured to determine, according to a level of the digital signal, whether the isolating circuit is open or closed. 2. The digital signal input circuit according to claim 1 , wherein the voltage determining circuit further comprises: a switching device; and a voltage comparator coupled to the switching device, comprising: a first voltage comparator input end is connected to the DI port and configured to receive the digital signal; a second voltage comparator input end coupled to a reference voltage source; and an output end of the voltage comparator coupled to the switching device, wherein the voltage comparator is configured to control an on/off state of the switching device according to a high-low relationship between the level of the digital signal and a level of the reference voltage source, and wherein the switching device is configured to control the isolating circuit to be open or closed. 3. The digital signal input circuit according to claim 2 , wherein the first voltage comparator input end is a non-inverting input end, and wherein the second voltage comparator input end is an inverting input end. 4. The digital signal input circuit according to claim 2 , wherein the switching device is a bipolar transistor, wherein the output end of the voltage comparator is coupled to a base of the bipolar transistor, wherein a collector of the bipolar transistor is coupled to the isolating circuit, and wherein an emitter of the bipolar transistor is grounded. 5. The digital signal input circuit according to claim 2 , wherein the voltage determining circuit further comprises a resistive voltage division circuit, comprising: a resistive voltage division circuit input end connected to the DI port and configured to receive the digital signal; and a resistive voltage division circuit output end coupled to the non-inverting input end of the voltage comparator, wherein the resistive voltage division circuit is configured to perform voltage division on the digital signal. 6. The digital signal input circuit according to claim 1 , wherein a collector of the isolating circuit comprises a photobipolar transistor, wherein an output end of the photobipolar transistor is coupled to a power supply using a pull-up resistor, wherein the output end of the photobipolar transistor is connected to the DO port and configured to output the converted digital signal, and wherein the power supply is configured to provide a voltage to the pull-up resistor to convert the level of the digital signal into the first level or the second level. 7. The digital signal input circuit according to claim 1 , wherein a collector of the isolating circuit comprises a photobipolar transistor, wherein an input end of the photobipolar transistor is coupled to a power supply using a pull-up resistor, wherein the input end of the photobipolar transistor is connected to the DO port and configured to output the converted digital signal, and wherein the power supply is configured to provide a voltage to the pull-up resistor to convert the level of the digital signal into the first level or the second level. 8. The digital signal input circuit according to claim 1 , wherein the digital signal input circuit further comprises a constant current source circuit coupled to the isolating circuit, wherein an emitter of the isolating circuit comprises a light emitting diode, wherein an input end of the constant current source circuit is connected to the DI port and configured to receive the digital signal, wherein an output end of the constant current source circuit is coupled to the light emitting diode of the isolating circuit, and wherein the constant current source circuit is configured to provide a constant current to the light emitting diode. 9. The digital signal input circuit according to claim 8 , wherein the constant current source circuit comprises a first bipolar transistor, a second bipolar transistor, and a resistor, wherein a model of the first bipolar transistor is the same as a model of the second bipolar transistor, and wherein the first bipolar transistor and branch circuits in which the resistor and the second bipolar transistor are located are coupled in parallel between the input end and the output end of the constant current source circuit. 10. The digital signal input circuit according to claim 8 , wherein the constant current source circuit is encapsulated into a constant current source chip.

Assignees

Inventors

Classifications

  • for isolation, e.g. using optocouplers · CPC title

  • using opto-electronic devices · CPC title

  • using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled · CPC title

  • Measuring arrangements for voltage not covered by other subgroups of G01R15/14 · CPC title

  • of deviations from the desired transfer characteristic (H03M1/0617 takes precedence) · CPC title

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What does patent US9954672B1 cover?
A digital signal input circuit including an isolating circuit and a voltage determining circuit is presented, where a first port of an input end of the isolating circuit receives a digital signal, an output end of the isolating circuit outputs the digital signal, and when the isolating circuit is open, the isolating circuit is configured to output a first level, or when the isolating circuit is…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03K19/017536. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).