Low noise amplifier circuit

Patent metadata

Field	Value
Publication number	US-9948248-B2
Application number	US-201515120304-A
Country	US
Kind code	B2
Filing date	Feb 23, 2015
Priority date	Feb 28, 2014
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

First claim

The invention claimed is:

1. A low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:
a first transistor, configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;
a second transistor, configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and
a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:
a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;
a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor; and
the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor;
the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor; and
a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor,

and wherein a gate or base of the first transistor is coupled to the single-ended input signal (V IN ) through a matching circuit.

2. The amplifier according to claim 1 , wherein the first and second inductors comprise a single differential inductor.

3. The amplifier according to claim 1 , wherein an input impedance of the amplifier is configured to match an output impedance of a radio frequency filter.

4. The amplifier according to claim 1 , wherein the first and second inductors are coupled to ground via a parasitic impedance.

5. The amplifier according to claim 1 , wherein the cross-coupled third and fourth transistors are sized such that a non-linearity of the second transistor is cancelled.

6. The amplifier according to claim 1 , wherein the cross-coupled third and fourth transistors are sized such that the differential output signal is well-balanced.

7. The amplifier according to claim 1 , wherein the first transistor is connected to a first end of the first inductor, wherein the second transistor is connected to a first end of the second inductor, wherein a second end of the first inductor and a second end of the second inductor are coupled together to form a first node, and wherein the cross-coupled third and fourth transistors are sized such that a current between the first node and ground is zero or essentially zero.

8. The amplifier according to claim 1 , wherein the first transistor is connected to a first end of the first inductor, wherein the second transistor is connected to a first end of the second inductor, wherein a second end of the first inductor and a second end of the second inductor are coupled together to form a first node, and wherein the cross-coupled third and fourth transistors are sized such that a non-linearity of the second transistor is cancelled, a current between the first node and ground is zero or essentially zero, and the differential output signal is well-balanced.

9. A wireless communication device comprising one or more amplifiers wherein each amplifier of the one or more amplifiers is a low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:
a first transistor configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;
a second transistor configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and
a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:
a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;
a drain or collector of the second transistor is coupled to a gate or base of the third transistor via a second capacitor; and
the drain or collector of the first transistor is connected to a source or emitter of the third transistor, the drain or collector of the second transistor is connected to a source or emitter of the fourth transistor;
the drain or collector of the first transistor is coupled to a gate or base of the second transistor directly or via a third capacitor; and
a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor,

and wherein a gate or base of the first transistor is coupled to the single-ended input signal (V IN ) through a matching circuit.

10. The wireless communication device according to claim 9 , wherein the cross-coupled third and fourth transistors are sized such that a non-linearity of the second transistor is cancelled.

11. The wireless communication device according to claim 9 , wherein the cross-coupled third and fourth transistors are sized such that the differential output signal is well-balanced.

12. The wireless communication device according to claim 9 , wherein the first transistor is connected to a first end of the first inductor, wherein the second transistor is connected to a first end of the second inductor, wherein a second end of the first inductor and a second end of the second inductor are coupled together to form a first node, and wherein the cross-coupled third and fourth transistors are sized such that a current between the first node and ground is zero or essentially zero.

13. The wireless communication device according to claim 9 , wherein the first transistor is connected to a first end of the first inductor, wherein the second transistor is connected to a first end of the second inductor, wherein a second end of the first inductor and a second end of the second inductor are coupled together to form a first node, and wherein the cross-coupled third and fourth transistors are sized such that a non-linearity of the second transistor is cancelled, a current between the first node and ground is zero or essentially zero, and the differential output signal is well-balanced.

14. A receiver for operating at multiple frequency bands, the receiver comprising:
one or more radio-frequency filters configured to receive a single-ended input signal and to generate a single-ended output signal;
one or more amplifiers configured to convert a single-ended input signal, being the single-ended output signal generated from the radio-frequency filter, to a differential output signal, wherein each amplifier of the one or more amplifiers is a low noise amplifier for converting a single-ended input signal to a differential output signal, the amplifier comprising:
a first transistor configured in common-source or common-emitter mode, to receive the single-ended input signal and generate a first part of the differential output signal;
a second transistor configured in common-source or common-emitter mode, to generate a second part of the differential output signal; and
a third transistor and a fourth transistor, and wherein the third transistor and forth transistor are cross-coupled and connected to the first and second transistors such that:
a drain or collector of the first transistor is coupled to a gate or base of the fourth transistor via a first capacitor;
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Assignees

• Ericsson Telefon Ab L M

Inventors

• Sivonen Pete
• Jussila Jarkko
• Vilhonen Sami

Classifications

• H03F2200/54

  Two or more capacitor coupled amplifier stages in cascade · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• H03F1/56 Primary

  Modifications of input or output impedances, not otherwise provided for · CPC title

• H03F3/265

  with field-effect transistors only · CPC title

• H03F2200/87

  the cross coupling circuit being realised only by MOSFETs · CPC title