Apparatus and methods for reducing inductor ringing of a voltage converter

Patent metadata

Field	Value
Publication number	US-9948241-B2
Application number	US-201715581443-A
Country	US
Kind code	B2
Filing date	Apr 28, 2017
Priority date	Nov 18, 2011
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

Apparatus and methods for reducing inductor ringing of a voltage converter are provided. In certain configurations, a voltage converter includes an inductor connected between a first node and a second node, a plurality of switches, and a bypass circuit having an activated state and a deactivated state. The switches includes a first switch connected between a battery voltage and the first node, a second switch connected between the first node and a ground voltage, a third switch connected between the second node and the ground voltage, and a fourth switch connected between the second node and the output. The bypass circuit includes a first pair of transistors connected between the first node and the second node and configured to turn on to bypass the inductor in the activated state and to turn off in the deactivated state.

First claim

What is claimed is:

1. A voltage converter comprising:
an inductor connected between a first node and a second node;
a plurality of switches including a first switch connected between a battery voltage and the first node, a second switch connected between the first node and a ground voltage, a third switch connected between the second node and the ground voltage, and a fourth switch connected between the second node and the output; and
a bypass circuit having an activated state and a deactivated state, the bypass circuit including a first pair of transistors connected between the first node and the second node and configured to turn on to bypass the inductor in the activated state and to turn off in the deactivated state.

2. The voltage converter of claim 1 wherein the bypass circuit further includes a second pair of transistors connected between the first node and the second node and configured to turn on in the activated state and to turn off in the deactivated state.

3. The voltage converter of claim 2 wherein the first pair of transistors is p-type and the second pair of transistors is n-type.

4. The voltage converter of claim 1 wherein the first pair of transistors includes a first p-type field effect transistor and a second p-type field effect transistor.

5. The voltage converter of claim 4 wherein the first p-type field effect transistor and the second p-type field effect transistors are biased with different body voltages.

6. The voltage converter of claim 4 wherein the first p-type field effect transistor and the second p-type field effect transistor operate with different gate voltages.

7. The voltage converter of claim 1 wherein the first pair of transistors includes a first n-type field effect transistor and a second n-type field effect transistor.

8. The voltage converter of claim 7 wherein the first n-type field effect transistor and the second n-type field effect transistors are biased with different body voltages.

9. The voltage converter of claim 7 wherein the first n-type field effect transistor and the second n-type field effect transistor operate with different gate voltages.

10. A method of voltage conversion, the method comprising:
generating an output voltage based on controlling a current through an inductor using a plurality of switches, the plurality of switches including a first switch connected between a battery voltage and a first end of the inductor, a second switch connected between the first end of the inductor and a ground voltage, a third switch connected between a second end of the inductor and the ground voltage, and a fourth switch connected between the second end of the inductor and the output voltage; and
controlling bypassing of the inductor using a bypass circuit connected in parallel with the inductor and having an activated state and a deactivated state;
turning on a first pair of transistors of the bypass circuit in the activated state; and
turning off the first pair of transistors in the deactivated state.

11. The method of claim 10 further comprising turning on a second pair of transistors of the bypass circuit in the activated state and turning off the second pair of transistor in the deactivated state, the first pair of transistors of p-type and the second pair of transistors of n-type.

12. A wireless device comprising:
a power amplifier configured to provide amplification to a radio frequency signal; and
a supply control module configured to generate a supply voltage of the power amplifier, the supply control module including a voltage converter configured to generate an output voltage at an output, the voltage converter including a first switch connected between a battery voltage and a first node, a second switch connected between the first node and a ground voltage, a third switch connected between a second node and the ground voltage, a fourth switch connected between the second node and the output, an inductor connected between the first node and the second node, and a bypass circuit having an activated state and a deactivated state, the bypass circuit including a first pair of transistors connected between the first node and the second node and configured to turn on to bypass the inductor in the activated state and to turn off in the deactivated state.

13. The wireless device of claim 12 wherein the bypass circuit further includes a second pair of transistors connected between the first node and the second node and configured to turn on in the activated state and to turn off in the deactivated state.

14. The wireless device of claim 13 wherein the first pair of transistors is p-type and the second pair of transistors is n-type.

15. The wireless device of claim 12 wherein the first pair of transistors includes a first p-type field effect transistor and a second p-type field effect transistor.

16. The wireless device of claim 15 wherein the first p-type field effect transistor and the second p-type field effect transistor operate with different gate voltages.

17. The wireless device of claim 12 wherein the supply control module includes a voltage adjustment module that generates the supply voltage of the power amplifier based on adjusting the output voltage based on an envelope of the radio frequency signal.

18. The wireless device of claim 17 wherein the voltage adjustment module includes an amplifier configured to provide linear tracking of the envelope of the radio frequency signal.

19. The wireless device of claim 12 wherein the first pair of transistors includes a first n-type field effect transistor and a second n-type field effect transistor.

20. The wireless device of claim 15 wherein the first n-type field effect transistor and the second n-type field effect transistor operate with different gate voltages.

Assignees

• Skyworks Solutions Inc
• Snaptrack Inc

Inventors

• Popplewell Peter Harris Robert
• Pingot Jakub F
• Balteanu Florinel G
• Wilson Martin
• Tuckwell Mark

Classifications

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F1/0211

  with control of the supply voltage or current · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03F2203/21106

  An input signal being distributed in parallel over the inputs of a plurality of power amplifiers · CPC title