Solid-state imaging device, method of manufacturing the same, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9947703-B2
Application number	US-201515113861-A
Country	US
Kind code	B2
Filing date	Feb 5, 2015
Priority date	Feb 18, 2014
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

The present disclosure relates to a solid-state imaging device that can be made smaller in size, a method of manufacturing the solid-state imaging device, and an electronic apparatus.
The solid-state imaging device includes a photoelectric conversion film that performs photoelectric conversion of light emitted from the back surface side of the semiconductor substrate. Also, in each pixel, a charge accumulation layer is formed to be in contact with the photoelectric conversion film on the back surface of the semiconductor substrate, a transfer path unit is formed to extend from the charge accumulation layer to a point near the front surface of the semiconductor substrate, and a memory unit is disposed near the back surface side of the semiconductor substrate, with a charge transfer gate being interposed between the memory unit and the transfer path unit. Then, the photoelectric conversion film is formed by stacking a layer formed with a material having a great light blocking effect on the back surface of the semiconductor substrate. The present technology can be applied to back-illuminated CMOS image sensors in global shutter mode.

First claim

The invention claimed is:

1. A solid-state imaging device, comprising:
a semiconductor substrate having a plurality of pixels arranged in an array; and
a photoelectric conversion film configured to perform photoelectric conversion of light emitted from a first surface of the semiconductor substrate,
wherein:
each pixel of the plurality of pixels includes:
a charge accumulation layer configured to accumulate charge generated in the photoelectric conversion film, the charge accumulation layer being in contact with the photoelectric conversion film on the first surface of the semiconductor substrate;
a pinning layer disposed in the semiconductor substrate, to be in contact with the charge accumulation layer; and
a transfer path unit configured to serve as a path to transfer the charge accumulated in the charge accumulation layer, the transfer path unit being disposed to extend from the charge accumulation layer to a first point near a second surface, and is in contact with the pining layer,
the second surface facing an opposite side from the first surface of the semiconductor substrate; and
the photoelectric conversion film is formed by layer stacked on the first surface of the semiconductor substrate, the layer being disposed with a material having a great light blocking effect.

2. The solid-state imaging device according to claim 1 , wherein the transfer path unit has a potential gradient, a potential becomes deeper in a direction from the charge accumulation layer toward the second surface of the semiconductor substrate.

3. The solid-state imaging device according to claim 1 , wherein an area of the transfer path unit is smaller than an area of the charge accumulation layer when the semiconductor substrate is seen in a plan view.

4. The solid-state imaging device according to claim 1 , wherein the each pixel of the plurality of pixels further includes a memory unit configured to hold the charge transferred from the charge accumulation layer until the charge is read from the each pixel of the plurality of pixels, the memory unit being disposed near the second surface of the semiconductor substrate, a charge transfer gate being interposed between the memory unit and the transfer path unit.

5. The solid-state imaging device according to claim 4 , wherein the each pixel of the plurality of pixels further includes an overflow drain formed on the second surface of the semiconductor substrate, the overflow drain being disposed on a different side of the transfer path unit from a side having the memory unit formed thereon, a discharge gate being interposed on the second surface between the overflow drain and the transfer path unit.

6. The solid-state imaging device according to claim 5 , further comprising a drive circuit configured to drive the plurality of pixels, wherein the drive circuit is further configured to drive the discharge gate of the each pixel of the plurality of pixels substantially at a same time, and collectively discharge the charge accumulated in the charge accumulation layer into the overflow drain.

7. The solid-state imaging device according to claim 5 , wherein a first cutoff potential of the discharge gate that discharges the charge from the transfer path unit into the overflow drain is lower than a second cutoff potential of the charge transfer gate that transfers the charge from the transfer path unit to the memory unit.

8. The solid-state imaging device according to claim 1 , wherein the photoelectric conversion film is a film formed with a compound lattice-matched to the semiconductor substrate.

9. The solid-state imaging device according to claim 1 , wherein the photoelectric conversion film is a film formed with a silicide.

10. The solid-state imaging device according to claim 1 , wherein the photoelectric conversion film is a film formed with an organic material.

11. The solid-state imaging device according to claim 1 , further comprising a buffer layer configured to reduce impurity diffusion, the buffer layer being disposed between the semiconductor substrate and the photoelectric conversion film.

12. The solid-state imaging device according to claim 5 , wherein the pinning layer has a high concentration of a first impurity and is formed between the charge accumulation layer and the memory unit, the first impurity being different from a second impurity forming the charge accumulation layer and the memory unit.

13. The solid-state imaging device according to claim 12 , wherein: the charge accumulation layer and the pinning layer are formed on a silicon substrate forming the semiconductor substrate; and the memory unit is formed in an epitaxial layer by an epitaxial growth of silicon on a front surface of the silicon substrate.

14. The solid-state imaging device according to claim 12 , wherein the memory unit is formed to extend from a second point near a front surface of the semiconductor substrate to a third point in contact with the pinning layer.

15. The solid-state imaging device according to claim 5 , wherein an electrode to read the charge from the memory unit is formed to extend from a front surface of the semiconductor substrate toward the inside of the semiconductor substrate, the electrode being in contact with a side surface of the memory unit.

16. The solid-state imaging device according to claim 12 , wherein part of the pinning layer is formed to extend toward a front surface side of the semiconductor substrate, the part of the pinning layer covering a side surface of the memory unit.

17. The solid-state imaging device according to claim 16 , wherein the part of the pinning layer is formed to separate the memory unit and the transfer path unit from each other.

18. The solid-state imaging device according to claim 5 , wherein the each pixel of the plurality of pixels has a layout in which the memory unit has a largest area among elements formed in a plane including the memory unit.

19. An electronic apparatus, comprising
a solid-state imaging device including:
a semiconductor substrate having a plurality of pixels arranged in an array; and
a photoelectric conversion film configured to perform photoelectric conversion of light emitted from a first surface of the semiconductor substrate,
wherein:
each pixel of the plurality of pixels includes:
a charge accumulation layer configured to accumulate charge generated in the photoelectric conversion film, the charge accumulation layer being in contact with the photoelectric conversion film on the first surface of the semiconductor substrate;
a pinning layer disposed in the semiconductor substrate, to be in contact with the charge accumulation layer; and
a transfer path unit configured to serve as a path to transfer the charge accumulated in the charge accumulation layer, the transfer path unit being disposed to extend from the charge accumulation layer to a point near a second surface, and is in contact with the pining layer, the second surface facing an opposite side from the first surface of the semiconductor substrate; and
the photoelectric conversion film is formed by stacking a layer stacked on the first surface of the semiconductor substrate, the layer being formed with a material having a great light blocking effect.

20. A solid-state imaging device, comprising:
a semiconductor substrate having a plurality of pixels arranged in an array; and
a photoelectric conversion film configured to perform photoelectric conversion of light emitted from a first surface of the semiconductor substrate,
wherein:
each pixel of the p

Assignees

• Sony Corp
• Sony Semiconductor Solutions Corp

Inventors

• Azami Kenji
• Otake Yusuke
• Ohgishi Yuko
• Wakano Toshifumi
• Toda Atsushi

Classifications

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H01L27/14656

  Electricity · mapped topic

• H01L27/1461

  Electricity · mapped topic

• H01L27/1464

  Electricity · mapped topic