Adaptive Automatic Defect Classification
US-2017082555-A1 · Mar 23, 2017 · US
US9947596B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9947596-B2 |
| Application number | US-201615227698-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 3, 2016 |
| Priority date | Aug 5, 2015 |
| Publication date | Apr 17, 2018 |
| Grant date | Apr 17, 2018 |
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A technique to identify non-visual defects, such as SEM non-visual defects (SNVs), includes generating an image of a layer of a wafer, evaluating at least one attribute of the image using a classifier, and identifying the non-visual defects on the layer of the wafer. A controller can be configured to identify the non-visual defects using the classifier. This controller can communicate with a defect review tool, such as a scanning electron microscope (SEM).
Opening claim text (preview).
What is claimed is: 1. A system comprising: a defect review tool, wherein the defect review tool has a stage configured to clamp a wafer; and a controller configured to communicate with the defect review tool, wherein the controller is configured to identify a non-visual defect on a layer of the wafer using a classifier, wherein the controller identifies the non-visual defect by using the classifier to filter at least one of topographical defects, intensity attributes, or energy attributes, wherein the topographical defects include a particle or a scratch, wherein the intensity attributes include a residue or a scum, and wherein the energy attributes include a void. 2. The system of claim 1 , wherein the controller comprises a processor configured to communicate with the defect review tool, a storage device in electronic communication with the processor containing the classifier, and a communication port in electronic communication with the processor for communicating with the defect review tool. 3. The system of claim 1 , wherein the defect review tool is a scanning electron microscope (SEM). 4. The system of claim 1 , wherein the non-visual defect is an SEM non-visual defect (SNV). 5. The system of claim 1 , wherein the classifier is configured to filter the topographical defects. 6. The system of claim 1 , wherein the classifier is configured to filter the intensity attributes. 7. The system of claim 1 , wherein the classifier is configured to filter the energy attributes. 8. A method comprising: generating, using a defect review tool, an image of a layer on a wafer; evaluating, using a processor, at least one attribute of the image using a classifier; and identifying, using the processor, a non-visual defect on the layer of the wafer using the classifier, wherein the processor identifies the non-visual defect by using the classifier to filter at least one of topographical defects, intensity attributes, or energy attributes, wherein the topographical defects include a particle or a scratch, wherein the intensity attributes include a residue or a scum, and wherein the energy attributes include a void. 9. The method of claim 8 , further comprising defining, using the processor, an upper limit and lower limit for non-visual defects, wherein the non-visual defect that is identified is between the upper limit and the lower limit. 10. The method of claim 8 , wherein the classifier filters the topographical defects. 11. The method of claim 8 , wherein the classifier filters the intensity attributes. 12. The method of claim 8 , wherein the classifier filters the energy attributes. 13. The method of claim 8 , wherein the classifier is configured to be used on each layer of the wafer. 14. The method of claim 8 , wherein the generating uses a scanning electron microscope (SEM). 15. The method of claim 8 , wherein the non-visual defect is an SEM non-visual defect (SNV). 16. The method of claim 8 , wherein the comparing and identifying may be performed in real-time with the generating.
Pattern inspection · CPC title
Inspection and quality control of devices · CPC title
Non-SPM analysing devices, e.g. SEM [Scanning Electron Microscope], spectrometer or optical microscope · CPC title
Semiconductor wafers (manufacturing processes per se of semiconductor devices implementing a measuring step H10P74/20) · CPC title
Specially adapted optical and illumination features · CPC title
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