Fast transient response low-dropout (LDO) regulator

Patent metadata

Field	Value
Publication number	US-9946283-B1
Application number	US-201615296608-A
Country	US
Kind code	B1
Filing date	Oct 18, 2016
Priority date	Oct 18, 2016
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

Certain aspects of the present disclosure generally relate a dual feedback loop regulator. For example, the regulator may include a first amplifier having an output coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator. A first input of a second amplifier may be coupled to the first feedback path and a second input of the second amplifier may be coupled to a reference path. The regulator may also include a transconductance stage having a first transistor and a first current source, the first transistor and the current source coupled to the first feedback path and the second feedback path, and a transimpedance stage coupled to the transconductance stage and an input of the first amplifier.

First claim

What is claimed is:

1. A regulator, comprising:
a pass transistor having a source coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator;
an amplifier having a first input coupled to the first feedback path and a second input coupled to a reference path;
a transconductance stage having a first transistor and a first current source, the first transistor and the first current source coupled to the first feedback path and the second feedback path; and
a transimpedance stage coupled to the transconductance stage and a gate of the pass transistor.

2. The regulator of claim 1 , wherein:
the pass transistor is configured to generate an output signal at the output node of the regulator;
the amplifier is configured to compare the output signal from the first feedback path and a first reference signal from the reference path, the amplifier being configured to provide a second reference signal at the output of the amplifier based on the comparison;
the transconductance stage is configured to generate a current based on the second reference signal and the output signal; and
the transimpedance stage is configured to generate a control voltage based on the current generated by the transconductance stage, wherein the control voltage drives the gate of the pass transistor to provide the output signal.

3. The regulator of claim 1 , wherein the transimpedance stage comprises a second transistor and a second current source, wherein the second transistor and the second current source are coupled to the first feedback path and the second feedback path.

4. The regulator of claim 3 , wherein a source of the second transistor is coupled to the output node of the regulator, the transimpedance stage further comprising an impedance coupled between a gate of the second transistor and a drain of the second transistor.

5. The regulator of claim 3 , further comprising:
a third transistor coupled to the amplifier and the first feedback path.

6. The regulator of claim 5 , wherein a gate of the third transistor is coupled to the output of the amplifier and a source of the third transistor is coupled to the output node.

7. The regulator of claim 5 , further comprising:
a current mirror having a first branch coupled to a drain of the third transistor, wherein a second branch of the current mirror is coupled to the drain of the second transistor.

8. The regulator of claim 1 , further comprising a second current source coupled between the output node and a reference potential of the regulator.

9. The regulator of claim 1 , wherein the pass transistor comprises an n-channel metal-oxide semiconductor (NMOS) transistor having a drain coupled to an input node, and wherein the gate of the pass transistor is coupled to an output of the transimpedance stage.

10. The regulator of claim 1 , further comprising:
a second transistor having a gate coupled to the output of the amplifier and a source coupled to the output node.

11. A regulator, comprising:
a pass transistor having a source coupled to an output node of the regulator and a feedback path;
an amplifier having a first input coupled to the feedback path and a second input coupled to a reference path;
a transconductance stage having a first transistor, the first transistor being coupled to an output of the amplifier and a source of the first transistor being coupled to the output node; and
a transimpedance stage coupled to the transconductance stage and a gate of the pass transistor.

12. The regulator of claim 11 , wherein:
the pass transistor is configured to generate an output signal at the output node of the regulator;
the amplifier is configured to compare the output signal from the feedback path and a first reference signal from the reference path, the amplifier being configured to provide a second reference signal at the output of the amplifier based on the comparison;
the transconductance stage is configured to generate a current based on the second reference signal and the output signal; and
the transimpedance stage is configured to generate a control voltage based on the current generated by the transconductance stage, wherein the control voltage drives the gate of the pass transistor to provide the output signal.

13. The regulator of claim 11 , further comprising a current source coupled between a drain of the first transistor and a voltage rail of the regulator.

14. The regulator of claim 11 , wherein the transimpedance stage comprises:
a second transistor having a source coupled to the output node of the regulator; and
an impedance coupled between a gate of the second transistor and a drain of the second transistor.

15. The regulator of claim 14 , further comprising a current source coupled between a drain of the second transistor and a voltage rail of the regulator.

16. The regulator of claim 14 , further comprising:
a third transistor having a gate coupled to the output of the amplifier and a source coupled to the output node.

17. The regulator of claim 16 , further comprising:
a current mirror having a first branch coupled to a drain of the third transistor, wherein a second branch of the current mirror is coupled to the drain of the second transistor.

18. The regulator of claim 14 , further comprising a current source coupled between the output node and a reference potential of the regulator.

19. The regulator of claim 11 , wherein the pass transistor comprises an n-channel metal-oxide semiconductor (NMOS) transistor having a drain coupled to an input node and wherein the gate of the pass transistor is coupled to an output of the transimpedance stage.

20. The regulator of claim 11 , further comprising:
a second transistor having a gate coupled to the output of the amplifier and a source coupled to the output node.

21. A method for signal regulation, comprising:
generating an output signal based on a control voltage;
comparing the output signal and a reference signal;
generating another reference signal based on the comparison;
generating a current via a first transistor, the first transistor having a gate to source voltage (Vgs) comprising a difference between a voltage of the other reference signal and a voltage of the output signal; and
generating the control voltage based on the current.

22. The method of claim 21 , wherein the current comprises a drain current of the first transistor.

23. The method of claim 21 , further comprising sourcing a current to a drain of the first transistor.

24. The method of claim 21 , wherein the control voltage is generated via a second transistor and an impedance coupled between a gate of the second transistor and a drain of the second transistor.

25. The method of claim 21 , further comprising:
generating another current via a second transistor, wherein a gate to source voltage (Vgs) of the second transistor comprises a difference between a voltage of the other reference signal and a voltage of the output signal; and
mirroring the other current, wherein generating the control voltage is based on the mirrored other current.

26. An apparatus for signal regulation, comprising:
means for generating an output signal based on a control voltage;
means for generating a reference signal by comparing the output signal and another reference signal;
a transistor for generating a current, the transistor havin

Assignees

• Qualcomm Inc

Inventors

• Yung Chi Fan
• Zou Xiaodan
• Ho Ngai Yeung
• Li Kan
• Guan Hua

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title