Resistive switching for MEMS devices

US9945727B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9945727-B2
Application numberUS-201515534110-A
CountryUS
Kind codeB2
Filing dateDec 10, 2015
Priority dateDec 10, 2014
Publication dateApr 17, 2018
Grant dateApr 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A MEMS device includes a bolometer attached to a silicon wafer by a base portion of at least one anchor structure. The base portion comprises a layer stack having a metal-insulator-metal (MIM) configuration such that the base portion acts as a resistive switch such that, when the first DC voltage is applied to the patterned conductive layer, the base portion transitions from a high resistive state to a low resistive state, and, when the second DC voltage is applied to the patterned conductive layer, the base portion transitions from a high resistive state to a low resistive state.

First claim

Opening claim text (preview).

What is claimed is: 1. A microelectromechanical systems (MEMS) device, comprising: a silicon wafer having an upper surface, the upper surface defining a sensing region; a patterned conductive layer on the upper surface; a bolometer including a suspension portion that extends over the sensing region, the suspension portion being suspended above the sensing region by at least one anchor structure which extends upwardly from the patterned conductive layer to space the suspension portion a predetermined distance apart from the upper surface of the silicon wafer, the suspension portion and the at least one anchor structure being formed by a layer stack comprising a bottom insulator layer and a top conductive layer; and a control circuit electrically connected to the patterned conductive layer and being configured to selectively apply a first DC voltage and a second DC voltage to the patterned conductive layer, wherein the at least one anchor structure includes a base portion that is attached to the patterned conductive layer, wherein, in the base portion of the at least one anchor structure, the bottom insulator layer is arranged adjacent the patterned conductive layer and is interposed between the top conductive layer and the patterned conductive layer such that there is no direct contact between the top conductive layer and the patterned conductive layer wherein the base portion of the at least one anchor structure is configured as a resistive switch such that, when the first DC voltage is applied to the patterned conductive layer, the base portion transitions from a high resistive state to a low resistive state, and, when the second DC voltage is applied to the patterned conductive layer, the base portion transitions from a high resistive state to a low resistive state, wherein, when in the high resistive state, the base portion has a resistance that substantially prevents current flow between the top conductive layer and the patterned conductive layer, and wherein, when in the low resistive state, the base portion of the at least one anchor structure forms an ohmic contact between the top conductive layer and the patterned conductive layer such that enables current to flow between the top conductive layer and the patterned conductive layer. 2. The MEMS device of claim 1 , wherein the bottom insulator layer is formed of alumina. 3. The MEMS device of claim 2 , wherein at least one of the top conductive layer and the patterned conductive layer comprises platinum. 4. The MEMS device of claim 1 , wherein the first DC voltage corresponds to a SET voltage for the resistive switch and the second DC voltage corresponds to a RESET voltage for the resistive switch. 5. The MEMS device of claim 1 , wherein the bottom insulator layer has a thickness of approximately 10 nm. 6. The MEMS device of claim 5 , wherein the top conductive layer has a thickness of approximately 50 nm. 7. The MEMS device of claim 1 , wherein the at least one anchor structure comprises a first and second anchor structure, the first anchor structure including a first base portion that acts as a first resistive switching element and the second anchor structure including a second base portion that acts as a second resistive switching element. 8. A method of operating a MEMS device, the method comprising: applying a first DC voltage to a base portion of at least one anchor structure of a bolometer, the bolometer including a suspension portion that extends over a sensing region on a silicon wafer, the at least one anchor structure extending upwardly from a patterned conductive layer on the silicon wafer to space the suspension portion a predetermined distance apart from an upper surface of the silicon wafer, at least the base portion of the at least one anchor structure being formed by a layer stack comprising a bottom insulator layer and a top conductive layer, the bottom insulator layer being arranged adjacent the patterned conductive layer and being interposed between the top conductive layer and the patterned conductive layer such that there is no direct contact between the top conductive layer and the patterned conductive layer, wherein the base portion of the at least one anchor structure is configured as a resistive switch such that, when the first DC voltage is applied, the base portion transitions from a high resistive state to a low resistive state, wherein, when in the high resistive state, the base portion has a resistance that substantially prevents current flow between the top conductive layer and the patterned conductive layer, and wherein, when in the low resistive state, the base portion of the at least one anchor structure forms an ohmic contact between the top conductive layer and the patterned conductive layer such that enables current to flow between the top conductive layer and the patterned conductive layer. 9. The method of claim 8 , further comprising: applying a second DC voltage to the base portion of the at least one anchor structure, the application of the second DC voltage causing the base portion to transition from a low resistive state to a high resistive state. 10. The method of claim 9 , wherein the bottom insulator layer is formed of alumina. 11. The method of claim 10 , wherein at least one of the top conductive layer and the patterned conductive layer comprises platinum. 12. The method of claim 9 , wherein the first DC voltage corresponds to a SET voltage for the resistive switch and the second DC voltage corresponds to a RESET voltage for the resistive switch. 13. The method of claim 9 , wherein the at least one anchor structure comprises a first and second anchor structure, the first anchor structure including a first base portion that acts as a first resistive switching element and the second anchor structure including a second base portion that acts as a second resistive switching element. 14. A focal-plane-array of bolometers comprising: an array of bolometers having a predetermined number of rows and a predetermined number of columns, each of the bolometers including: a suspension portion that extends over a sensing region on a silicon wafer and at least one anchor structure extending upwardly from a patterned conductive layer on the silicon wafer to space the suspension portion a predetermined distance apart from an upper surface of the silicon wafer, the at least one anchor structure including a base portion formed by a layer stack comprising a bottom insulator layer and a top conductive layer, the bottom insulator layer being arranged adjacent the patterned conductive layer and being interposed between the top conductive layer and the patterned conductive layer such that there is no direct contact between the top conductive layer and the patterned conductive layer, wherein the base portion of the at least one anchor structure is configured as a resistive switch such that, when a SET voltage is applied, the base portion transitions from a high resistive state to a low resistive state, and when a RESET voltage is applied, the base portion transitions from the low resistive state to a high resistive state, wherein, when in the high resistive state, the base portion has a resistance that substantially prevents current flow between the top conductive layer and the patterned conductive layer, wherein, when in the low resistive state, the base portion of the at least one anchor structure forms an ohmic contact between the top conductive layer and the patterned conductive layer such that enables current to flow between the top conductive layer and the patterned conductive layer, and a control circuit electrically connected to array of bol

Assignees

Inventors

Classifications

  • having infrared absorbers other than the usual absorber layers deposited on infrared detectors like bolometers, wherein the heat propagation between the absorber and the detecting element occurs within a solid · CPC title

  • Special manufacturing steps or sacrificial layers or layer structures · CPC title

  • Arrays · CPC title

  • G01J5/20Primary

    using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices · CPC title

  • Electricity · mapped topic

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What does patent US9945727B2 cover?
A MEMS device includes a bolometer attached to a silicon wafer by a base portion of at least one anchor structure. The base portion comprises a layer stack having a metal-insulator-metal (MIM) configuration such that the base portion acts as a resistive switch such that, when the first DC voltage is applied to the patterned conductive layer, the base portion transitions from a high resistive st…
Who is the assignee on this patent?
Bosch Gmbh Robert
What technology area does this patent fall under?
Primary CPC classification G01J5/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).