Space transformer with perforated metallic plate for electrical die test

US9941652B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9941652-B2
Application numberUS-201514973543-A
CountryUS
Kind codeB2
Filing dateDec 17, 2015
Priority dateDec 17, 2015
Publication dateApr 10, 2018
Grant dateApr 10, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Space transformer including a substrate and a perforated plate disposed on the substrate. The substrate includes conductive traces and an array of conductive probe pins extend outwardly from anchor points on the substrate. The pins are electrically coupled to at least one of the conductive traces on the substrate as an interface between an E-testing apparatus and a DUT. The perforated plate may be affixed to a surface of the substrate and includes an array of perforations through which the conductive pins may pass. The perforated plate may provide one or more of lateral pin support and protection to the underlying substrate and/or traces. The perforated plate may include a metal sheet. A polymeric material may be disposed on at least a sidewall of the perforations to electrically isolate the metal sheet from the conductive probe pins.

First claim

Opening claim text (preview).

What is claimed is: 1. An electrical-test prober space transformer, comprising: a substrate including a plurality of conductive traces, the traces to electrically couple with an electrical testing apparatus; an array of conductive pins, the pins extending outwardly from a-first pin ends anchored to the substrate and electrically coupled to the conductive traces; and a perforated plate affixed to a surface of the substrate and including an array of perforations through which the conductive pins pass, wherein the perforated plate comprises a metal sheet insulated from the conductive pins by an insulative material on a sidewall of the perforations, but absent from at least a portion of a top surface of the metal sheet opposite the substrate. 2. The prober space transformer of claim 1 , wherein the insulative material is a polymeric material. 3. The prober space transformer of claim 2 , wherein the polymeric material defines a through hole within each of a plurality of the perforations, the through hole having a diameter gradation, with a largest diameter of the through hole proximal to the substrate. 4. The prober space transformer of claim 2 , wherein the polymeric material is a derivative of a resin selected from the group consisting of: epoxy acrylate, epoxy Novolac® acrylate, methacrylate, polyimide, bismaleimide, polyurethane, polycarbonate, polyester, phenol, and benzocyclobutene, and parylene. 5. The prober space transformer of claim 2 , wherein the polymeric material is a matrix component of a composite material further including a filler. 6. The prober space transformer of claim 5 , wherein the filler is selected from the group consisting of: silica particles, ceramic particles, glass fibers, and aramid fibers. 7. The prober space transformer of claim 1 , wherein: the substrate comprises an organic polymer; and the perforated plate has a lateral coefficient of thermal expansion (CTE) of at least 15 ppm/° C. and a Young's modulus of at least 100 GPa at 23° C. 8. The prober space transformer of claim 1 , wherein the metal sheet comprises at least one of copper or an alloy thereof, aluminum or an alloy thereof, or a stainless steel alloy. 9. The prober space transformer of claim 1 , wherein a perforation in the array of perforations has a minimum diameter less than 80 μm and a pitch less than 150 μm. 10. The prober space transformer of claim 9 , wherein the insulative material is a polymeric material defining a through hole within each of a plurality of the perforations, the through hole having a minimum diameter less than 60 μm. 11. The prober space transformer of claim 10 , wherein a longitudinal axis of the through hole is not coincident with a longitudinal axis of the perforation. 12. The prober space transformer of claim 11 , wherein the through hole has a sidewall slope that is less than that of the perforation through the metal sheet. 13. The prober space transformer of claim 1 , wherein the metal sheet is electrically floating or coupled to a reference voltage potential to be supplied by the electrical testing apparatus. 14. A method of testing a singulated unpackaged die, the method comprising: aligning the die to an array of conductive pins disposed on a prober space transformer, the pins: extending outwardly from first pin ends electrically coupled to conductive traces disposed on a space transformer substrate; and passing through a perforated metal sheet affixed to a surface of the substrate by an adhesive, the pins insulated from the metal sheet by a polymeric material disposed on at least a sidewall of the perforations, the polymeric material defining a through hole having a diameter gradation, and a largest diameter of the through hole proximal to the substrate; contacting a top metallization level of the die with second pin ends of the conductive pin array; and executing an electrical test algorithm on the die through the array of conductive pins. 15. The method of claim 14 , wherein the perforated metal sheet has a lateral coefficient of thermal expansion (CTE) of at least 15 ppm/° C. and a Young's modulus of at least 100 GPa at 23° C.

Assignees

Inventors

Classifications

  • H01R43/20Primary

    for assembling or disassembling contact members with insulating base, case or sleeve · CPC title

  • using an intermediate adapter, e.g. space transformers (G01R1/07371 takes precedence) · CPC title

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Frequently asked questions

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What does patent US9941652B2 cover?
Space transformer including a substrate and a perforated plate disposed on the substrate. The substrate includes conductive traces and an array of conductive probe pins extend outwardly from anchor points on the substrate. The pins are electrically coupled to at least one of the conductive traces on the substrate as an interface between an E-testing apparatus and a DUT. The perforated plate may…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H01R43/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).