Self-aligned block patterning with density assist pattern

US9941164B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9941164-B1
Application numberUS-201715623862-A
CountryUS
Kind codeB1
Filing dateJun 15, 2017
Priority dateDec 5, 2016
Publication dateApr 10, 2018
Grant dateApr 10, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method of generating mask layouts for self-aligned block patterning is provided. Metal line patterns to be formed on a semiconductor substrate is identified. A mandrel mask layout for first mask based on the metal line patterns is generated in view of a self-aligned double patterning (SADP) process for forming a plurality of mandrels on the semiconductor substrate. The mandrel mask layout may include a plurality of mandrel patterns. A non-mandrel block mask layout for second mask is generated based on the mandrel mask layout for cutting metal lines formed under gaps between spacers in non-mandrel area on the semiconductor substrate. The non-mandrel block mask layout may include a plurality of first block patterns and a plurality of first density assist patterns. A mandrel block mask layout for third mask is generated based on the mandrel mask layout for cutting metal lines formed under mandrel area on the semiconductor substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of generating mask layouts for self-aligned block patterning comprising: identifying metal line patterns to be formed on a semiconductor substrate; generating a mandrel mask layout for first mask based on the metal line patterns in view of a self-aligned double patterning (SADP) process for forming a plurality of mandrels on the semiconductor substrate, the mandrel mask layout comprising a plurality of mandrel patterns; generating a non-mandrel block mask layout for second mask based on the mandrel mask layout for cutting metal lines formed under gaps between spacers in non-mandrel area on the semiconductor substrate, the non-mandrel block mask layout comprising a plurality of first block patterns and a plurality of first density assist patterns; and generating a mandrel block mask layout for third mask based on the mandrel mask layout for cutting metal lines formed under mandrel area on the semiconductor substrate, the mandrel block mask layout comprising a plurality of second block patterns and a plurality of second density assist patterns, wherein, the spacers are formed on both sidewalls of each of the plurality of mandrels on the semiconductor substrate in the SADP process, combination of the plurality of first block patterns and the plurality of first density assist patterns has a pattern density about 30% or greater in the non-mandrel block mask layout, and combination of the plurality of second block patterns and the plurality of second density assist patterns has a pattern density about 30% or greater in the mandrel block mask layout. 2. The method of claim 1 , wherein the metal line patterns comprise a plurality of mandrel metal lines, which are formed under the mandrel area, and a plurality of non-mandrel metal lines, which are formed under the gaps between spacers in non-mandrel area, alternately arranged and spaced apart in a first direction, and extending parallelly to each other in a second direction. 3. The method of claim 2 , wherein the plurality of mandrel patterns in the mandrel mask layout are corresponding to the plurality of mandrel metal lines to be formed on the semiconductor substrate, and are used to print images for forming the plurality of mandrel metal lines. 4. The method of claim 1 , wherein the generating of the non-mandrel block mask layout comprises: locating the plurality of mandrel patterns in the mandrel mask layout; and generating the plurality of first density assist patterns in the non-mandrel block mask layout so as to overlap the plurality of mandrel patterns of the mandrel mask layout, wherein the plurality of first density assist patterns do not overlap area corresponding to the gaps between spacers in non-mandrel area. 5. The method of claim 4 , wherein each of the first density assist patterns in the non-mandrel block mask layout overlaps area corresponding to each mandrel of the plurality of mandrels and at least half width each of two spacers on both sidewalls of the mandrel, and extends in a second direction along with the mandrel to be formed on the semiconductor substrate. 6. The method of claim 1 , wherein the generating of the mandrel block mask layout comprises: locating the plurality of mandrel patterns in the mandrel mask layout; and generating the plurality of second density assist patterns in the mandrel block mask layout so as not to overlap the plurality of mandrel patterns of the mandrel mask layout. 7. The method of claim 6 , wherein each of the second density assist patterns in the mandrel block mask layout overlaps area corresponding to each gap of the gaps between spacers in non-mandrel area and at least half width of each two spacers at both sides of the gap between spacers in non-mandrel area, and extends in a second direction along with the gap between spacers in non-mandrel area to be formed on the semiconductor substrate. 8. The method of claim 1 , wherein the combination of the plurality of first block patterns and the plurality of first density assist patterns has a pattern density about 40% or greater in the non-mandrel block mask layout, and the combination of the plurality of second block patterns and the plurality of second density assist patterns has a pattern density about 40% or greater in the mandrel block mask layout. 9. The method of claim 1 , wherein the plurality of first block patterns and the plurality of first density assist patterns are homogeneously distributed in the non-mandrel block mask layout, and the plurality of second block patterns and the plurality of second density assist patterns are homogeneously distributed in the mandrel block mask layout. 10. The method of claim 1 , wherein the first, second and third masks are each independently selected from one of 193 nm photomask and EUV mask. 11. A self-aligned block patterning method comprising: providing a substrate comprising a first hard mask layer and a second hard mask layer over a dielectric layer, with the second hard mask layer being on top of the first hard mask layer; forming a plurality of mandrels and a plurality of spacers on the second hard mask layer, with two spacers being on both sidewalls of each mandrel and a non-mandrel gap formed between two adjacent spacers; performing non-mandrel block photolithography process using non-mandrel block mask to form first block photoresist patterns for cutting non-mandrel metal lines and first dummy photoresist patterns overlapping the mandrels, with the non-mandrel block mask comprising first block mask patterns and first density assist mask patterns; removing the second hard mask layer under the non-mandrel gaps not overlapped by the first block photoresist patterns through etching; performing mandrel block photolithography process using mandrel block mask to form second block photoresist patterns for cutting mandrel metal lines and second dummy photoresist patterns overlapping the non-mandrel gaps, with the mandrel block mask comprising second block mask patterns and second density assist mask patterns; removing the second hard mask layer under the mandrels not overlapped by the second block photoresist patterns through etching; etching through the first hard mask layer to form recesses in the dielectric layer, and removing all remaining first hard mask layer and any layers thereabove; depositing a metal layer to fill the recesses; and planarizing the metal layer to expose top surface of the dielectric layer to form the mandrel metal lines and the non-mandrel metal lines, wherein the first density assist mask patterns are for printing the first dummy photoresist patterns, the second density assist mask patterns are for printing the second dummy photoresist patterns, combination of the first block mask patterns and the first density assist mask patterns has a pattern density about 30% or greater in the non-mandrel block mask, and combination of the second block mask patterns and the second density assist mask patterns has a pattern density about 30% or greater in the mandrel block mask. 12. The method of claim 11 , wherein the first dummy photoresist patterns overlap the mandrels and the spacers, but not the non-mandrel gaps, and the second dummy photoresist patterns overlap the non-mandrel gaps and the spacers, but not the mandrels. 13. The method of claim 11 , wherein the combination of the first block mask patterns and the first density assist mask patterns has a pattern density about 40% or greater in the non-mandrel block mask, and the combination of the second block mask patterns and the second density assist mask patterns has a pattern density about 40% or greater in the mandrel block mask.

Assignees

Inventors

Classifications

  • Processes for improving the resolution of the masks · CPC title

  • characterised by the processes involved to create the masks · CPC title

  • Process specially adapted to improve the resolution of the mask · CPC title

  • characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

  • characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9941164B1 cover?
A method of generating mask layouts for self-aligned block patterning is provided. Metal line patterns to be formed on a semiconductor substrate is identified. A mandrel mask layout for first mask based on the metal line patterns is generated in view of a self-aligned double patterning (SADP) process for forming a plurality of mandrels on the semiconductor substrate. The mandrel mask layout may…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P76/4085. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).