Nonvolatile memory device, nonvolatile memory system including the same, and method of operating the same

Patent metadata

Field	Value
Publication number	US-9941014-B2
Application number	US-201414477347-A
Country	US
Kind code	B2
Filing date	Sep 4, 2014
Priority date	Jan 2, 2014
Publication date	Apr 10, 2018
Grant date	Apr 10, 2018

Abstract

A nonvolatile memory device includes a memory cell array having a normal area and a temporary area. A page buffer stores data to be written to the normal area in a normal program operation and store a temporary data to be written to the temporary area in a temporary program operation. A control logic performs the normal program operation including a plurality of program loops. The control logic receives a suspend command before the normal program operation is completed and determines, in response to the suspend command, whether to complete the normal program operation or to suspend the normal operation and perform the temporary program operation based on a reference value representing a time for performing at least one program loop of the plurality of program loops.

First claim

What is claimed is:

1. A method of operating a nonvolatile memory comprising:
storing data in a page buffer;
performing a normal program operation on a plurality of multi-level memory cells using the data, wherein the normal program operation is performed by iterating a plurality of program loops, wherein the number of the plurality of program loops is M;
receiving a suspend command while an Nth program loop is being executed, wherein N is less than M;
if a time for completing the temporary program is equal to or less than a time for executing (M−N) program loops not executed before the receiving of the suspend command, performing a temporary program operation on a plurality of single-level memory cells using temporary data; and
if the time for completing the temporary program is greater than the time for performing (M−N) program loops, performing an (N+1)th program loop.

2. The method of claim 1 , further comprising, if the time for completing the temporary program is equal to er less than the time for executing (M−N) program loops, completing the Nth program loop including verifying whether the data is programmed in the plurality of multi-level memory cells and updating the data with the verifying result to generate temporary data, wherein the temporary program operation is performed using the temporary data.

3. The method of claim 1 , further comprising receiving a read operation while the Nth program loop is being executed.

4. The method of claim 3 , further comprising, if the time for completing the temporary program is equal to or less than the time for executing (M−N) program loops, suspending the (M−N) program loops and storing suspend information in the nonvolatile memory device, wherein the suspend information indicates that the normal program operation is suspended.

5. The method of claim 3 , further comprising, if the time for completing the temporary program is equal to or less than the time for performing (M−N) program loops, suspending the (M−N) program loops of the normal program operation and storing suspend information indicating that the normal operation is suspended in a register, and
further comprising receiving a resume command after the read operation is completed and completing the (M−N) program loops in response to the resume command using the temporary data.

6. A nonvolatile memory system comprising:
a nonvolatile memory device including a normal area and a temporary area and configured to perform a normal program operation having a plurality of program loops on the normal area using data and to perform a temporary program operation on the temporary area using temporary data; and
a memory controller configured to issue a suspend command to the nonvolatile memory device based on a ready/busy signal from the nonvolatile memory device and a request for an operation with high priority from an external device,
wherein the nonvolatile memory device is further configured to detect a number of remaining program loops when the nonvolatile memory device receives the suspend command from the memory controller, to compare the detected number of the remaining program loops with a reference value, and to suspend the remaining program loops of the normal program operation and perform the temporary program operation, and
wherein the nonvolatile memory device is further configured to update the data to the temporary data including a verification result of each of the plurality of program loops being executed.

7. The nonvolatile memory system of claim 6 , wherein the nonvolatile memory device is configured to store suspend information in the nonvolatile memory device if the normal program operation is suspended, wherein the suspend information indicates that the normal program operation is suspended.

8. The nonvolatile memory system of claim 7 , wherein the memory controller is further configured to perform the operation with the high priority while the program operation is suspended and to issue a resume command after the operation with the high priority is completed, and wherein the nonvolatile memory device is further configured to resume the remaining program loops using the temporary data stored in the temporary area in response to the resume command.

9. The nonvolatile memory system of claim 6 , wherein the memory controller is further configured to transmit a temporary address to the nonvolatile memory device, wherein the nonvolatile memory device stores the temporary data in memory cells of the temporary area, wherein the memory cells of the temporary area are selected based on the temporary address.

10. The nonvolatile memory system of claim 6 , wherein if the number of the remaining program loops of the normal program operation is equal to or smaller than the reference value, the nonvolatile memory device performs the remaining program loops to complete the normal program operation, wherein if the number of the remaining program loops is greater than the reference value, the nonvolatile memory device performs the temporary program operation and suspends the normal program operation.

11. A nonvolatile memory device comprising:
a memory cell array including a normal area and a temporary area;
a page buffer configured to store data to be written to the normal area in a normal program operation and store temporary data to be written to the temporary area in a temporary program operation;
a control logic configured to perform the normal program operation including a plurality of program loops, to receive a suspend command before the normal program operation is completed, to determine, in response to the suspend command, whether to complete the normal program operation or whether to suspend the normal program operation and perform the temporary program operation based on a reference value representing a time for performing at least one program loop of the plurality of program loops,
wherein the control logic is configured to set a ready/busy signal to a ready state after the temporary data stored in the pages buffer is programmed in the temporary area.

12. The nonvolatile memory device of claim 11 , further comprising:
a program loop managing unit configured to detect the number of remaining program loops that represents the number of program loops not executed of the plurality of program loops in the normal program operation,
wherein the control logic is further configured to receive the number of remaining program loops and to compare the number of remaining program loops and the reference value.

13. The nonvolatile memory device of claim 11 , wherein the reference value is determined based on the maximum number of the plurality of program loops, the number of remaining program loops, and a temporary program time for programming of the temporary data.

14. The nonvolatile memory device of claim 11 , wherein the normal area includes multi-level memory cells configured to store at least two data bits and the temporary area includes single-level memory cells configured to store one data bit.

15. The nonvolatile memory device of claim 11 , further comprising:
a program loop managing unit configured to detect the number of remaining program loops that represents the number of program loops not executed of the plurality of program loops in the normal program operation,
wherein the control logic is further configured to receive the number of remaining program loops and to compare the number of remaining program loops and the reference value, and
wherein if the number of remaining program loops is greater than the reference value, the control logic is further configured to suspend the normal program op

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Chulho

Classifications

• G11C11/5628

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• A47G9/1027 Primary

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• G11C2207/2245

  Memory devices with an internal cache buffer · CPC title

• A47G9/109

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• G11C16/10

  Programming or data input circuits · CPC title