Liquid crystal display device, method of driving liquid crystal display device, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9940887-B2
Application number	US-201615170400-A
Country	US
Kind code	B2
Filing date	Jun 1, 2016
Priority date	Mar 1, 2012
Publication date	Apr 10, 2018
Grant date	Apr 10, 2018

Abstract

A liquid crystal display device is provided. The liquid crystal including an array of pixels each having a memory function; and a buffer to output a first voltage, wherein a second voltage is supplied to a counter electrode of a liquid crystal capacitor, and wherein each of the pixels supplies one of the first voltage and the second voltage to a pixel electrode of the liquid crystal capacitor according to a data value stored in the each of the pixels.

First claim

The invention is claimed as follows:

1. A liquid crystal display device comprising:
an array of pixels each having a memory section; and
a buffer to output a first alternating signal having a predetermined high voltage and a predetermined low voltage,
wherein a reference voltage is supplied to a counter electrode of a liquid crystal capacitor,
wherein each of the pixels supplies one of the first alternating signal and the reference voltage to a pixel electrode of the liquid crystal capacitor according to a data value stored in the memory section of the each of the pixels,
wherein the predetermined low voltage is lower than the reference voltage and the predetermined high voltage is higher than the reference voltage; and
wherein a first voltage difference between the predetermined high voltage and the reference voltage is larger than a second voltage difference between the reference voltage and the predetermined low voltage.

2. The liquid crystal display device according to claim 1 , wherein
a third voltage difference is a difference between the first voltage difference and the second voltage difference, and
the third voltage difference is twice a DC voltage that is constantly applied to a liquid crystal capacitor of each pixel.

3. The liquid crystal display device according to claim 1 , wherein
the memory section is a latch circuit and supplies one of the first alternating signal and the reference voltage to each pixel, according to a signal from a control line driving section that is coupled with the memory circuit.

4. The liquid crystal display device according to claim 3 , wherein
each of the pixels includes the pixel electrodes each of which is coupled with the latch circuit, and
gray levels are displayed by combinations of areas of the pixel electrodes according to a condition of the latch circuits.

5. The liquid crystal display device according to claim 4 , wherein
areas of the pixel electrodes in each of the pixels are different.

6. The liquid crystal display device according to claim 3 , wherein
each of the pixels has the pixel electrodes and latch circuits including a first latch circuit coupled with a single pixel electrode and a second latch circuit coupled with the pixel electrodes.

7. The liquid crystal display device according to claim 1 , further comprising:
a power source coupled with the buffer; and
an adjusting section,
wherein the adjusting section is configured to adjust an amplitude of the power source.

8. The liquid crystal display device according to claim 1 , wherein
the reference voltage is a DC voltage.

9. The liquid crystal display device according to claim 1 , wherein
an average value of the first alternating signal is shifted to a positive side with respect to the reference voltage.

10. The liquid crystal display device according to claim 1 , wherein
each of the pixels has the pixel electrodes and the memory section including a first latch circuit coupled with a single pixel electrode and a second latch circuit coupled with the pixel electrodes.

Assignees

• Japan Display Inc

Inventors

• Teranishi Yasuyuki

Classifications

• G09G2310/06

  Details of flat display driving waveforms · CPC title

• G09G5/18

  Timing circuits for raster scan displays (specially adapted for television H04N {; synchronisation between the display unit and other display units, videodisc player G09G5/12}) · CPC title

• G09G3/2018

  by time modulation using two or more time intervals · CPC title

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

• G09G3/3607

  for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels (display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127) · CPC title