Display device which prevents occurrence of flicker

US9940886B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9940886-B2
Application numberUS-201414511755-A
CountryUS
Kind codeB2
Filing dateOct 10, 2014
Priority dateOct 10, 2013
Publication dateApr 10, 2018
Grant dateApr 10, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display device which prevents or minimizes the occurrence of flicker is provided. The display device includes a display panel having pixels, with data lines and gate lines that are respectively connected with the pixels. A display driving circuit is configured to vary a frame frequency of the display panel according to an operation mode, to select a gamma curve corresponding to the frame frequency. The selected gamma curve is one among gamma curves that are set so as to correspond to different frame frequencies. The display panel is driven based on the selected gamma curve.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a display panel comprising: a plurality of pixels, and a plurality of data lines and a plurality of gate lines that are respectively connected with the plurality of pixels; and a display driving circuit configured to: set a frame frequency corresponding to the display panel according to an operation mode, select a gamma curve corresponding to the frame frequency from among a plurality of gamma curves that are set so as to correspond to different frame frequencies, and drive the display panel based on the selected gamma curve and the frame frequency, wherein the display driving circuit drops a level of a gate-on voltage from a first voltage level to a second voltage level according to a kickback signal to adjust a falling slew rate of a gate signal. 2. The display device of claim 1 , wherein the display driving circuit is further configured to: store a first gamma selection signal and a second gamma selection signal that correspond to different gamma curves, respectively, and select one of the first gamma selection signal and the second gamma selection signal as a gamma control signal, according to the frame frequency. 3. The display device of claim 1 , wherein the plurality of gamma curves comprises: a first gamma curve that corresponds to a first frame frequency, and a second gamma curve that corresponds to a second frame frequency that is lower than the first frame frequency, and wherein grayscale voltages of the second gamma curve are lower than grayscale voltages of the first gamma curve. 4. The display device of claim 1 , wherein, during a moving image mode, the display driving circuit displays a moving image received from an external source on the display panel, based on a first frame frequency, and wherein, during a still image mode, the display driving circuit displays a still image stored in an internal frame memory on the display panel, based on a second frame frequency that is lower than the first frame frequency. 5. The display device of claim 4 , wherein, during the moving image mode, the display driving circuit generates a display synchronization signal having the first frame frequency, based on a control signal and an external clock signal that are provided from the external source, and wherein, during the still image mode, the display driving circuit generates a display synchronization signal having the second frame frequency, based on an internal clock signal. 6. The display device of claim 1 , wherein the display driving circuit is configured to adjust the falling slew rate of a gate signal that is provided to each of the plurality of gate lines, according to the frame frequency. 7. The display device of claim 6 , wherein the display driving circuit is configured to generate the gate signal by using the gate-on voltage and a gate-off voltage, and wherein, when the frame frequency is equal to or lower than a reference value, the display driving circuit periodically drops the level of the gate-on voltage. 8. The display device of claim 1 , further comprising: a host controller configured to provide image data and an operation mode signal for indicating the operation mode to the display driving circuit. 9. The display device of claim 8 , wherein, when the image data is a moving image, the host controller provides a first operation mode signal indicating a moving image mode to the display driving circuit, and wherein, when the image data is a still image, the host controller provides a second operation mode signal indicating a still image mode to the display driving circuit. 10. The display device of claim 8 , wherein, during a power-on or initial setting of the display device, the host controller provides a plurality of gamma selection signals that correspond to the plurality of gamma curves, respectively, to the display driving circuit. 11. The display device of claim 1 , wherein the display panel comprises an oxide thin film transistor substrate in which each of the plurality of pixels comprises an oxide thin film transistor.

Assignees

Inventors

Classifications

  • G09G3/3648Primary

    using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

  • Detection of image changes, e.g. determination of an index representative of the image change · CPC title

  • for control of overall brightness · CPC title

  • Change or adaptation of the frame rate of the video stream · CPC title

  • Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9940886B2 cover?
A display device which prevents or minimizes the occurrence of flicker is provided. The display device includes a display panel having pixels, with data lines and gate lines that are respectively connected with the pixels. A display driving circuit is configured to vary a frame frequency of the display panel according to an operation mode, to select a gamma curve corresponding to the frame freq…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3648. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 10 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).