Symmetric linear equalization circuit with increased gain
US-9692381-B2 · Jun 27, 2017 · US
US9939467B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9939467-B1 |
| Application number | US-201615293615-A |
| Country | US |
| Kind code | B1 |
| Filing date | Oct 14, 2016 |
| Priority date | Oct 14, 2016 |
| Publication date | Apr 10, 2018 |
| Grant date | Apr 10, 2018 |
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An RF peak-detector circuit can operate over a wide range and can compensate or correct an output voltage error term that depends on the thermal voltage and the input signal voltage. At or near a minimum value of the input signal voltage range, such compensation can include a scaled base-emitter ratioing of bipolar junction transistors used to generate the output voltage, each of which can be biased by a primary current. At or near a maximum value of the input signal voltage range, this can include using an auxiliary bias current circuit that can shift auxiliary bias current between these bipolar junction transistors. The auxiliary bias current circuit can include scaled bipolar junction transistors in a cross-coupled configuration and an equivalent resistance circuit between emitters of the cross-coupled BJTs. This can provide a robust approach for improving the accuracy of an RF peak-detector circuit over a wide range.
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The claimed invention is: 1. A radio-frequency (RF) peak-detector circuit, comprising: a signal input stage including first and second transistors across which an output voltage is produced in response to an input signal voltage received via the first transistor, the first and second transistors having respective bias currents and scaled sizes that, at a first value of the output voltage, offset an error term that depends on a thermal voltage and the input signal voltage; and first and second auxiliary bias current circuits respectively coupled to a corresponding one of the first and second transistors, the first and second auxiliary bias current circuits providing respective voltage-dependent auxiliary bias currents that are a function of the output voltage across the first and second transistors selected to offset, at a second value of the output voltage that is different from the first value of the output voltage, the error term that depends on the thermal voltage and the input signal voltage. 2. The RF peak-detector circuit of claim 1 , wherein the first and second auxiliary bias current circuits are configured to provide respective voltage-dependent auxiliary bias currents that are a function of the output voltage across the first and second transistors selected to offset, at two different values of the output voltage corresponding to (1) an input voltage near a minimum input voltage and to (2) an input voltage near a maximum input voltage, the error term that depends on the thermal voltage and the input signal voltage. 3. The RF peak-detector circuit of claim 1 , wherein the first and second auxiliary bias current circuits together include: third and fourth transistors having respective bias currents and scaled sizes that are selected to provide, to the first and second transistors respectively, similar-valued auxiliary bias currents when the output voltage is minimal; and wherein the third and fourth transistors are cross-coupled, such that a control terminal of the third transistor is coupled to a conduction terminal of the fourth transistor and a control terminal of the fourth transistor is coupled to a conduction terminal of the third transistor. 4. The RF peak-detector circuit of claim 3 , wherein: each of the first, second, third, and fourth transistors are respectively connected to and biased with a like-valued primary bias current, I o ; and the third transistor is connected to provide its auxiliary bias current to the first transistor, and the fourth transistor is connected to provide its auxiliary bias current to the second transistor. 5. The RF-peak detector circuit of claim 4 , wherein: the first transistor is scaled to have a larger effective area than the second transistor; and the third transistor is scaled to have a larger effective area than the fourth transistor. 6. The RF peak-detector circuit of claim 4 , wherein: the third and fourth transistors are cross-coupled, and include a base terminal of the third transistor is coupled to a collector terminal of the fourth transistor and a base terminal of the fourth transistor is coupled to a collector terminal of the third transistor; and the collector terminal of the third transistor is coupled to an emitter terminal of the first transistor, and the collector terminal of the fourth transistor is coupled to an emitter terminal of the second transistor; and further comprising an equivalent resistance circuit connecting an emitter terminal of the third transistor to an emitter terminal of the fourth transistor. 7. The RF peak-detector circuit of claim 6 , wherein the equivalent resistance circuit includes a pair of leg circuits including diode-connected transistors, respectively individually connected to and biased with similar-valued individual bias currents and collectively connected to and biased with a shared biased current selected as the sum of the individual bias currents. 8. The RF peak-detector circuit of claim 1 , further comprising: a first level-shifter circuit between the first transistor and the first auxiliary bias current circuit; and a second level-shifter circuit between the second transistor and the second auxiliary bias current circuit. 9. The RF peak-detector circuit of claim 8 , wherein the first and second level shifter circuits each comprise a corresponding diode-connected transistor. 10. The RF peak-detector circuit of claim 1 , wherein the first and second auxiliary bias current circuits together include: third and fourth transistors that are cross-coupled, and include a base terminal of the third transistor is coupled to a collector terminal of the fourth transistor and a base terminal of the fourth transistor is coupled to a collector terminal of the third transistor; and wherein the first, second, third, and fourth transistors are all NPN bipolar junction transistors, wherein an emitter terminal of the first transistor is coupled to the collector terminal of the third transistor, and wherein an emitter terminal of the second transistor is coupled to the collector terminal of the fourth transistor. 11. The RF peak-detector circuit of claim 1 , wherein the first and second auxiliary bias current circuits together include: third and fourth transistors that are cross-coupled, and include a base terminal of the third transistor is coupled to a collector terminal of the fourth transistor and a base terminal of the fourth transistor is coupled to a collector terminal of the third transistor; and wherein the first and second transistors are NPN bipolar junction transistors and the third and fourth transistors are PNP bipolar junction transistors, wherein an emitter terminal of the first transistor is coupled to a base terminal of the third transistor and to the collector terminal of the fourth transistor, and wherein an emitter terminal of the second transistor is coupled to a base terminal of the fourth transistor and to the collector terminal of the third transistor. 12. The RF peak-detector circuit of claim 11 , wherein the first and second transistors are respectively biased with primary currents sinking 3I o from each respective emitter of the first and second transistors, and wherein the third and fourth transistors collectively source a sum of 2I o to, and variably divided between, the emitters of the first and second transistors. 13. A radio-frequency (RF) peak-detection method, comprising: receiving an input signal voltage at a signal input stage including first and second transistors across which an output voltage is produced in response to the input signal voltage received via the first transistor; biasing respective primary bias currents of the first and second transistors to offset, at a first value of the output voltage, an error term that depends on a thermal voltage and the input signal voltage; and biasing respective auxiliary bias currents of the first and second transistors using respective voltage-dependent auxiliary bias currents that are a function of the output voltage across the first and second transistors selected to offset, at a second value of the output voltage that is different from the first value of the output voltage, the error term that depends on the thermal voltage and the input signal voltage. 14. The RF peak-detection method of claim 13 , comprising: providing the first and second auxiliary bias currents as respective voltage-dependent auxiliary bias currents that are a function of the output voltage across the first and second transistors selected to offset, at two different values of the output voltage corresponding to (1) an input voltage near a minimum input voltage and to (2) an input vo
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